[U-Boot] imximage on the MX50

[U-Boot] imximage on the MX50

[Andre Renaud]

Hi,
I'm trying to port u-boot 2013.10-rc2 to the i.MX50 (which is very
similar to the i.MX53).

However I'm not having much luck with the imximage, and have so far
not managed to make the unit run stand-alone.

Specifically, the dcd_ptr in the v2 imx header points to an address in
DDR, however I would have thought that on power-up the DCD is loaded
somewhere in iRAM (since the DDR isn't running at this stage), and
then only once this has been interpreted is the full image loaded into
DDR. The tools/imximage.c code appears to only work with DDR
addresses, and I'm assuming that this same system works fine on the
MX53.

Can anyone shed any light on this?

Regards,
Andre

[U-Boot] imximage on the MX50

[Stefano Babic]

Hi Andre,

On 02/10/2013 05:23, Andre Renaud wrote:
> Hi,
> I'm trying to port u-boot 2013.10-rc2 to the i.MX50 (which is very
> similar to the i.MX53).
> 

Fine !

> However I'm not having much luck with the imximage, and have so far
> not managed to make the unit run stand-alone.
> 
> Specifically, the dcd_ptr in the v2 imx header points to an address in
> DDR, however I would have thought that on power-up the DCD is loaded
> somewhere in iRAM (since the DDR isn't running at this stage), and
> then only once this has been interpreted is the full image loaded into
> DDR. The tools/imximage.c code appears to only work with DDR
> addresses, and I'm assuming that this same system works fine on the
> MX53.
> 
> Can anyone shed any light on this?

The bootROM copies the DCD data into an area that is not specified, but
we can assume is in the IRAM. As part of the boot process, the bootROM
copies the image into a DEST memory - this is as it is called in the
manuals, and this after the DCD table is parsed and executed. That means
that is possible to set dcd_ptr pointint to DDR if the DCD table is
programmed to set up the DDR controller, as it is actually done for
i.MX51/i.MX53/i.MX6 in u-boot.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
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[U-Boot] imximage on the MX50

[Andre Renaud]

Hi Stefano,

>> Specifically, the dcd_ptr in the v2 imx header points to an address in
>> DDR, however I would have thought that on power-up the DCD is loaded
>> somewhere in iRAM (since the DDR isn't running at this stage), and
>> then only once this has been interpreted is the full image loaded into
>> DDR. The tools/imximage.c code appears to only work with DDR
>> addresses, and I'm assuming that this same system works fine on the
>> MX53.
>>
>> Can anyone shed any light on this?
>
> The bootROM copies the DCD data into an area that is not specified, but
> we can assume is in the IRAM. As part of the boot process, the bootROM
> copies the image into a DEST memory - this is as it is called in the
> manuals, and this after the DCD table is parsed and executed. That means
> that is possible to set dcd_ptr pointint to DDR if the DCD table is
> programmed to set up the DDR controller, as it is actually done for
> i.MX51/i.MX53/i.MX6 in u-boot.

Can you recommend any mechanism for debugging the boot rom execution?
I can see on the SPI bus that it is trying to read from the boot
flash, and it is getting the correct data (ie, the u-boot.imx image is
programmed properly). However it is still failing and ending up in USB
fall-back mode. Given your comments about the dcd_ptr, I can assume
that isn't the problem, which leaves me at a bit of a dead end.

Regards,
Andre

[U-Boot] imximage on the MX50

[Stefano Babic]

Hi Andre,

On 02/10/2013 21:41, Andre Renaud wrote:

> Can you recommend any mechanism for debugging the boot rom execution?
> I can see on the SPI bus that it is trying to read from the boot
> flash, and it is getting the correct data (ie, the u-boot.imx image is
> programmed properly). However it is still failing and ending up in USB
> fall-back mode. Given your comments about the dcd_ptr, I can assume
> that isn't the problem, which leaves me at a bit of a dead end.

Are you sure that the DDR controller is corrctly initialized ? You can
check with the JTAG debugger if the RAM is working as expected. If there
are some errors in your DCD table and the controller is not correctly
set, the processor will fall back to USB.

You could also set a breakpoint to the U-Boot start address - after
loading U-Boot, the SOC jumps to this address. You can check if it is hit.

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================