From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Wed, 02 Oct 2013 16:45:03 +0200 Subject: [U-Boot] [PATCH] ARM: mx5: Enable L2 cache In-Reply-To: References: <1380557812-1460-1-git-send-email-fabio.estevam@freescale.com> <524BDB25.6080505@denx.de> Message-ID: <524C316F.8010507@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Fabio, On 02/10/2013 15:43, Fabio Estevam wrote: > Hi Stefano, > > On Wed, Oct 2, 2013 at 5:36 AM, Stefano Babic wrote: > >> This is a repost from a your previous patch on August, 19th, where you >> report slow tftp transfer even with L2-cache enable. Was this issue >> solved or it is completeley unrelated to the cache ? > > Actually the motivation for sending this patch this time was because I > am currently working with a customer's USB centric application. > By only applying this patch we can see CPU usage being decreased from > 35% to 25%. > > The TFTP transfer in U-boot is still slow though, but this needs to be > investigated separately. Ok, understood, thanks - I'll pick up this one for the next PR. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================