From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Wed, 16 Oct 2013 11:10:23 +0200 Subject: [U-Boot] [PATCH] ARM: mxs: Do not reconfigure FEC clock in FEC init In-Reply-To: <201310152319.34204.marex@denx.de> References: <1381677634-6589-1-git-send-email-marex@denx.de> <525BAC91.5080703@denx.de> <201310152319.34204.marex@denx.de> Message-ID: <525E57FF.1020903@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Marek, On 15/10/2013 23:19, Marek Vasut wrote: > > Forget this, the issue is still present. Damn! > > It's at least a little clearer to me what happens now. The FEC fails to transmit > an TFTP block ACK packet -> the server waits 5 seconds -> sends ARP packet -> > FEC replies and resends the TFTP block ACK again. Why does the FEC swallow a TX > packet, I don't know. Anyway, it is strange that this happens only with this board. It appears as the SOC sends or thinks to have sent, but the packet is corrupted or not sent at all on the physical layer. Maybe you can check on the other side of the connection on the switch and/or on the server, if some errors are detected. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================