From: Zhang Haijun <b42677@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
Date: Mon, 21 Oct 2013 16:23:46 +0800 [thread overview]
Message-ID: <5264E492.2070606@freescale.com> (raw)
In-Reply-To: <1381571453-7814-1-git-send-email-Haijun.Zhang@freescale.com>
Hi, all
Who can give some comments?
? 2013/10/12 17:50, Haijun Zhang ??:
> When Auto-CMD12 is used, the corresponding interrupt and error bit
> should be enabled and set to reflect auto cmd 12 error.
> Also add other command error detecting, like command index error,
> CRC error etc. Without this command error bit set system will hang
> due to the while loop.
>
> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
> ---
> drivers/mmc/fsl_esdhc.c | 10 +++++-----
> include/fsl_esdhc.h | 3 ++-
> 2 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index dc1d002..5aa592b 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -342,13 +342,13 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
> #endif
>
> /* Wait for the command to complete */
> - while (!(esdhc_read32(®s->irqstat) & (IRQSTAT_CC | IRQSTAT_CTOE)))
> + while (!(esdhc_read32(®s->irqstat) & (IRQSTAT_CC | CMD_ERR)))
> ;
>
> irqstat = esdhc_read32(®s->irqstat);
>
> /* Reset CMD and DATA portions on error */
> - if (irqstat & (CMD_ERR | IRQSTAT_CTOE)) {
> + if (irqstat & CMD_ERR) {
> esdhc_write32(®s->sysctl, esdhc_read32(®s->sysctl) |
> SYSCTL_RSTC);
> while (esdhc_read32(®s->sysctl) & SYSCTL_RSTC)
> @@ -363,12 +363,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
> }
> }
>
> - if (irqstat & CMD_ERR)
> - return COMM_ERR;
> -
> if (irqstat & IRQSTAT_CTOE)
> return TIMEOUT;
>
> + if (irqstat & CMD_ERR)
> + return COMM_ERR;
> +
> /* Workaround for ESDHC errata ENGcm03648 */
> if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
> int timeout = 2500;
> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
> index 67d6057..37dbe27 100644
> --- a/include/fsl_esdhc.h
> +++ b/include/fsl_esdhc.h
> @@ -62,7 +62,8 @@
> #define IRQSTAT_TC (0x00000002)
> #define IRQSTAT_CC (0x00000001)
>
> -#define CMD_ERR (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
> +#define CMD_ERR (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE | \
> + IRQSTAT_CTOE | IRQSTAT_AC12E)
> #define DATA_ERR (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \
> IRQSTAT_DMAE)
> #define DATA_COMPLETE (IRQSTAT_TC | IRQSTAT_DINT)
--
Thanks & Regards
Haijun.
next prev parent reply other threads:[~2013-10-21 8:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-12 9:50 [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting Haijun Zhang
2013-10-21 8:23 ` Zhang Haijun [this message]
2013-10-21 9:19 ` Stefano Babic
2013-10-21 9:23 ` Zhang Haijun
2013-11-01 7:44 ` Zhang Haijun
2013-11-01 7:45 ` Pantelis Antoniou
2013-11-01 7:47 ` Zhang Haijun
2014-01-29 21:14 ` York Sun
2014-01-30 6:33 ` Pantelis Antoniou
2014-01-06 3:16 ` Zhang Haijun
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