From: Heiko Schocher <hs@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [RFC PATCH 7/7] spl: mmc: FAT support boot u-boot
Date: Wed, 30 Oct 2013 11:15:05 +0100 [thread overview]
Message-ID: <5270DC29.6080807@denx.de> (raw)
In-Reply-To: <1383124508-8413-8-git-send-email-voice.shen@atmel.com>
Hello Bo,
Am 30.10.2013 10:15, schrieb Bo Shen:
> Enable SPL support which can load u-boot from SD card in FAT format.
>
> Signed-off-by: Bo Shen<voice.shen@atmel.com>
>
> ---
> arch/arm/cpu/armv7/Makefile | 2 +-
> arch/arm/cpu/armv7/at91/u-boot-spl.lds | 50 +++++++++++++
> arch/arm/include/asm/arch-at91/spl.h | 17 +++++
> board/atmel/sama5d3xek/sama5d3xek.c | 123 ++++++++++++++++++++++++++++++++
> include/configs/sama5d3xek.h | 37 ++++++++++
> 5 files changed, 228 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/cpu/armv7/at91/u-boot-spl.lds
> create mode 100644 arch/arm/include/asm/arch-at91/spl.h
[...]
> diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c
> index 7fa3ae7..4a5aea3 100644
> --- a/board/atmel/sama5d3xek/sama5d3xek.c
> +++ b/board/atmel/sama5d3xek/sama5d3xek.c
> @@ -20,6 +20,9 @@
> #include<micrel.h>
> #include<net.h>
> #include<netdev.h>
> +#include<spl.h>
> +#include<asm/arch/atmel_mpddrc.h>
> +#include<asm/arch/at91_wdt.h>
>
> #ifdef CONFIG_USB_GADGET_ATMEL_USBA
> #include<asm/arch/atmel_usba_udc.h>
> @@ -293,3 +296,123 @@ void spi_cs_deactivate(struct spi_slave *slave)
> }
> }
> #endif /* CONFIG_ATMEL_SPI */
> +
> +/* NAND SPL */
> +#ifdef CONFIG_SPL_BUILD
> +void spl_board_init(void)
> +{
> + sama5d3xek_mci_hw_init();
> +}
> +
> +u32 spl_boot_device(void)
> +{
> + return BOOT_DEVICE_MMC1;
> +}
> +
> +u32 spl_boot_mode(void)
> +{
> + switch (spl_boot_device()) {
> + case BOOT_DEVICE_MMC1:
> + return MMCSD_MODE_FAT;
> + break;
> + default:
> + hang();
> + }
> +}
> +
> +void ddr2_conf(struct atmel_mpddr *ddr2)
> +{
> + ddr2->mdr = (ATMEL_MPDDRC_MDR_DBW_32BITS | ATMEL_MPDDRC_MDR_DDR2_SDRAM);
> +
> + ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
> + ATMEL_MPDDRC_CR_NR_ROW_14 |
> + ATMEL_MPDDRC_CR_CAS_3 |
> + ATMEL_MPDDRC_CR_EN_ENRDM |
> + ATMEL_MPDDRC_CR_NB_8BANKS |
> + ATMEL_MPDDRC_CR_DIS_NDQS |
> + ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
> + ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
> +
> + ddr2->rtr = 0x411;
> +
> + ddr2->tp0r = (6<< ATMEL_MPDDRC_TP0R_TRAS_OFFSET |
> + 2<< ATMEL_MPDDRC_TP0R_TRCD_OFFSET |
> + 2<< ATMEL_MPDDRC_TP0R_TWR_OFFSET |
> + 8<< ATMEL_MPDDRC_TP0R_TRC_OFFSET |
> + 2<< ATMEL_MPDDRC_TP0R_TRP_OFFSET |
> + 2<< ATMEL_MPDDRC_TP0R_TRRD_OFFSET |
> + 2<< ATMEL_MPDDRC_TP0R_TWTR_OFFSET |
> + 2<< ATMEL_MPDDRC_TP0R_TMRD_OFFSET);
> +
> + ddr2->tp1r = (2<< ATMEL_MPDDRC_TP1R_TXP_OFFSET |
> + 200<< ATMEL_MPDDRC_TP1R_TXSRD_OFFSET |
> + 28<< ATMEL_MPDDRC_TP1R_TXSNR_OFFSET |
> + 26<< ATMEL_MPDDRC_TP1R_TRFC_OFFSET);
> +
> + ddr2->tp2r = (7<< ATMEL_MPDDRC_TP2R_TFAW_OFFSET |
> + 2<< ATMEL_MPDDRC_TP2R_TRTP_OFFSET |
> + 2<< ATMEL_MPDDRC_TP2R_TRPA_OFFSET |
> + 7<< ATMEL_MPDDRC_TP2R_TXARDS_OFFSET |
> + 8<< ATMEL_MPDDRC_TP2R_TXARD_OFFSET);
> +}
> +
> +void mem_init(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> + struct atmel_mpddr ddr2;
> +
> + ddr2_conf(&ddr2);
> +
> + /* enable MPDDR clock */
> + at91_periph_clk_enable(ATMEL_ID_MPDDRC);
> + writel(0x4,&pmc->scer);
> +
> + /* DDRAM2 Controller initialize */
> + ddr2_init(ATMEL_BASE_DDRCS,&ddr2);
> +}
> +
> +static void at91_disable_wdt(void)
> +{
> + struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT;
> +
> + writel(AT91_WDT_MR_WDDIS,&wdt->mr);
> +}
> +
> +static void sama5d3xek_plla_init(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> + u32 tmp;
> +
> + tmp = AT91_PMC_PLLAR_29 |
> + AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
> + AT91_PMC_PLLXR_MUL(43) |
> + AT91_PMC_PLLXR_DIV(1);
> + at91_plla_init(tmp, 10000);
> +
> + writel(0x3<< 8,&pmc->pllicpr);
> +}
> +
> +void s_init(void)
> +{
> + u32 tmp;
> +
> + /* disable watchdog */
> + at91_disable_wdt();
> +
> + /* PMC configuration */
> + sama5d3xek_plla_init();
> + tmp = AT91_PMC_MCKR_MDIV_4 |
> + AT91_PMC_MCKR_CSS_PLLA;
> + at91_mck_init(tmp, 10000);
> +
> + at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
> +
> + timer_init();
> +
> + board_early_init_f();
> +
> + preloader_console_init();
> +
> + mem_init();
> +}
> +#endif
All this functions could be moved to a common file, I vote for:
arch/arm/cpu/arm926ejs/at91/spl.c
What do you think?
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
next prev parent reply other threads:[~2013-10-30 10:15 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-30 9:15 [U-Boot] [RFC PATCH 0/7] arm: atmel: sama5d3: enable spl boot from SD card Bo Shen
2013-10-30 9:15 ` [U-Boot] [RFC PATCH 1/7] arm: atmel: sama5d3: early enable PIO peripherals Bo Shen
2013-10-30 10:12 ` Heiko Schocher
2013-10-30 11:11 ` Andreas Bießmann
2013-10-31 2:02 ` Bo Shen
2013-10-30 9:15 ` [U-Boot] [RFC PATCH 2/7] arm: atmel: sama5d3: correct the ID for DBGU and PIT Bo Shen
2013-10-30 11:12 ` Andreas Bießmann
2013-10-31 1:32 ` Bo Shen
2013-10-30 9:15 ` [U-Boot] [RFC PATCH 3/7] arm: atmel: the offset of MULA is 18 in sama5d3 Bo Shen
2013-10-30 9:15 ` [U-Boot] [RFC PATCH 4/7] arm: atmel: sama5: correct the error define of DIV Bo Shen
2013-10-30 9:15 ` [U-Boot] [RFC PATCH 5/7] arm: atmel: add plla and mck initialize function Bo Shen
2013-10-30 11:21 ` Andreas Bießmann
2013-10-31 1:38 ` Bo Shen
2013-10-30 9:15 ` [U-Boot] [RFC PATCH 6/7] arm: atmel: add ddr2 initialization function Bo Shen
2013-10-30 9:15 ` [U-Boot] [RFC PATCH 7/7] spl: mmc: FAT support boot u-boot Bo Shen
2013-10-30 10:15 ` Heiko Schocher [this message]
2013-10-30 10:43 ` Andreas Bießmann
2013-10-30 10:57 ` Heiko Schocher
2013-10-30 11:02 ` Andreas Bießmann
2013-10-31 1:30 ` Bo Shen
2013-10-31 7:42 ` Heiko Schocher
2013-10-31 7:50 ` Bo Shen
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