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* [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
@ 2013-10-12  9:50 Haijun Zhang
  2013-10-21  8:23 ` Zhang Haijun
  0 siblings, 1 reply; 10+ messages in thread
From: Haijun Zhang @ 2013-10-12  9:50 UTC (permalink / raw)
  To: u-boot

When Auto-CMD12 is used, the corresponding interrupt and error bit
should be enabled and set to reflect auto cmd 12 error.
Also add other command error detecting, like command index error,
CRC error etc. Without this command error bit set system will hang
due to the while loop.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
---
 drivers/mmc/fsl_esdhc.c | 10 +++++-----
 include/fsl_esdhc.h     |  3 ++-
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index dc1d002..5aa592b 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -342,13 +342,13 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 #endif
 
 	/* Wait for the command to complete */
-	while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | IRQSTAT_CTOE)))
+	while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | CMD_ERR)))
 		;
 
 	irqstat = esdhc_read32(&regs->irqstat);
 
 	/* Reset CMD and DATA portions on error */
-	if (irqstat & (CMD_ERR | IRQSTAT_CTOE)) {
+	if (irqstat & CMD_ERR) {
 		esdhc_write32(&regs->sysctl, esdhc_read32(&regs->sysctl) |
 			      SYSCTL_RSTC);
 		while (esdhc_read32(&regs->sysctl) & SYSCTL_RSTC)
@@ -363,12 +363,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 		}
 	}
 
-	if (irqstat & CMD_ERR)
-		return COMM_ERR;
-
 	if (irqstat & IRQSTAT_CTOE)
 		return TIMEOUT;
 
+	if (irqstat & CMD_ERR)
+		return COMM_ERR;
+
 	/* Workaround for ESDHC errata ENGcm03648 */
 	if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
 		int timeout = 2500;
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 67d6057..37dbe27 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -62,7 +62,8 @@
 #define IRQSTAT_TC		(0x00000002)
 #define IRQSTAT_CC		(0x00000001)
 
-#define CMD_ERR		(IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
+#define CMD_ERR		(IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE | \
+				IRQSTAT_CTOE | IRQSTAT_AC12E)
 #define DATA_ERR	(IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \
 				IRQSTAT_DMAE)
 #define DATA_COMPLETE	(IRQSTAT_TC | IRQSTAT_DINT)
-- 
1.8.0

^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
  2013-10-12  9:50 [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting Haijun Zhang
@ 2013-10-21  8:23 ` Zhang Haijun
  2013-10-21  9:19   ` Stefano Babic
  0 siblings, 1 reply; 10+ messages in thread
From: Zhang Haijun @ 2013-10-21  8:23 UTC (permalink / raw)
  To: u-boot

Hi, all

Who can give some comments?


? 2013/10/12 17:50, Haijun Zhang ??:
> When Auto-CMD12 is used, the corresponding interrupt and error bit
> should be enabled and set to reflect auto cmd 12 error.
> Also add other command error detecting, like command index error,
> CRC error etc. Without this command error bit set system will hang
> due to the while loop.
>
> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
> ---
>  drivers/mmc/fsl_esdhc.c | 10 +++++-----
>  include/fsl_esdhc.h     |  3 ++-
>  2 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index dc1d002..5aa592b 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -342,13 +342,13 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>  #endif
>  
>  	/* Wait for the command to complete */
> -	while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | IRQSTAT_CTOE)))
> +	while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | CMD_ERR)))
>  		;
>  
>  	irqstat = esdhc_read32(&regs->irqstat);
>  
>  	/* Reset CMD and DATA portions on error */
> -	if (irqstat & (CMD_ERR | IRQSTAT_CTOE)) {
> +	if (irqstat & CMD_ERR) {
>  		esdhc_write32(&regs->sysctl, esdhc_read32(&regs->sysctl) |
>  			      SYSCTL_RSTC);
>  		while (esdhc_read32(&regs->sysctl) & SYSCTL_RSTC)
> @@ -363,12 +363,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>  		}
>  	}
>  
> -	if (irqstat & CMD_ERR)
> -		return COMM_ERR;
> -
>  	if (irqstat & IRQSTAT_CTOE)
>  		return TIMEOUT;
>  
> +	if (irqstat & CMD_ERR)
> +		return COMM_ERR;
> +
>  	/* Workaround for ESDHC errata ENGcm03648 */
>  	if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
>  		int timeout = 2500;
> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
> index 67d6057..37dbe27 100644
> --- a/include/fsl_esdhc.h
> +++ b/include/fsl_esdhc.h
> @@ -62,7 +62,8 @@
>  #define IRQSTAT_TC		(0x00000002)
>  #define IRQSTAT_CC		(0x00000001)
>  
> -#define CMD_ERR		(IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
> +#define CMD_ERR		(IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE | \
> +				IRQSTAT_CTOE | IRQSTAT_AC12E)
>  #define DATA_ERR	(IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \
>  				IRQSTAT_DMAE)
>  #define DATA_COMPLETE	(IRQSTAT_TC | IRQSTAT_DINT)

-- 
Thanks & Regards
Haijun.

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
  2013-10-21  8:23 ` Zhang Haijun
@ 2013-10-21  9:19   ` Stefano Babic
  2013-10-21  9:23     ` Zhang Haijun
  0 siblings, 1 reply; 10+ messages in thread
From: Stefano Babic @ 2013-10-21  9:19 UTC (permalink / raw)
  To: u-boot

Hi,

On 21/10/2013 10:23, Zhang Haijun wrote:
> Hi, all
> 
> Who can give some comments?

I put Antonius in CC, he's the MMC custodian.


The driver is for both PPC and i.MX. On which platform do you test these
changes ?

Best regards,
Stefano Babic

> 
> 
> ? 2013/10/12 17:50, Haijun Zhang ??:
>> When Auto-CMD12 is used, the corresponding interrupt and error bit
>> should be enabled and set to reflect auto cmd 12 error.
>> Also add other command error detecting, like command index error,
>> CRC error etc. Without this command error bit set system will hang
>> due to the while loop.
>>
>> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
>> ---
>>  drivers/mmc/fsl_esdhc.c | 10 +++++-----
>>  include/fsl_esdhc.h     |  3 ++-
>>  2 files changed, 7 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>> index dc1d002..5aa592b 100644
>> --- a/drivers/mmc/fsl_esdhc.c
>> +++ b/drivers/mmc/fsl_esdhc.c
>> @@ -342,13 +342,13 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>>  #endif
>>  
>>  	/* Wait for the command to complete */
>> -	while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | IRQSTAT_CTOE)))
>> +	while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | CMD_ERR)))
>>  		;
>>  
>>  	irqstat = esdhc_read32(&regs->irqstat);
>>  
>>  	/* Reset CMD and DATA portions on error */
>> -	if (irqstat & (CMD_ERR | IRQSTAT_CTOE)) {
>> +	if (irqstat & CMD_ERR) {
>>  		esdhc_write32(&regs->sysctl, esdhc_read32(&regs->sysctl) |
>>  			      SYSCTL_RSTC);
>>  		while (esdhc_read32(&regs->sysctl) & SYSCTL_RSTC)
>> @@ -363,12 +363,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>>  		}
>>  	}
>>  
>> -	if (irqstat & CMD_ERR)
>> -		return COMM_ERR;
>> -
>>  	if (irqstat & IRQSTAT_CTOE)
>>  		return TIMEOUT;
>>  
>> +	if (irqstat & CMD_ERR)
>> +		return COMM_ERR;
>> +
>>  	/* Workaround for ESDHC errata ENGcm03648 */
>>  	if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
>>  		int timeout = 2500;
>> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
>> index 67d6057..37dbe27 100644
>> --- a/include/fsl_esdhc.h
>> +++ b/include/fsl_esdhc.h
>> @@ -62,7 +62,8 @@
>>  #define IRQSTAT_TC		(0x00000002)
>>  #define IRQSTAT_CC		(0x00000001)
>>  
>> -#define CMD_ERR		(IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
>> +#define CMD_ERR		(IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE | \
>> +				IRQSTAT_CTOE | IRQSTAT_AC12E)
>>  #define DATA_ERR	(IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \
>>  				IRQSTAT_DMAE)
>>  #define DATA_COMPLETE	(IRQSTAT_TC | IRQSTAT_DINT)
> 


-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
  2013-10-21  9:19   ` Stefano Babic
@ 2013-10-21  9:23     ` Zhang Haijun
  2013-11-01  7:44       ` Zhang Haijun
  0 siblings, 1 reply; 10+ messages in thread
From: Zhang Haijun @ 2013-10-21  9:23 UTC (permalink / raw)
  To: u-boot

Hi, Babic

Thanks.

This patch is test on PPC.


Regards,
Haijun


? 2013/10/21 17:19, Stefano Babic ??:
> Hi,
>
> On 21/10/2013 10:23, Zhang Haijun wrote:
>> Hi, all
>>
>> Who can give some comments?
> I put Antonius in CC, he's the MMC custodian.
>
>
> The driver is for both PPC and i.MX. On which platform do you test these
> changes ?
>
> Best regards,
> Stefano Babic
>
>>
>> ? 2013/10/12 17:50, Haijun Zhang ??:
>>> When Auto-CMD12 is used, the corresponding interrupt and error bit
>>> should be enabled and set to reflect auto cmd 12 error.
>>> Also add other command error detecting, like command index error,
>>> CRC error etc. Without this command error bit set system will hang
>>> due to the while loop.
>>>
>>> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
>>> ---
>>>   drivers/mmc/fsl_esdhc.c | 10 +++++-----
>>>   include/fsl_esdhc.h     |  3 ++-
>>>   2 files changed, 7 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>>> index dc1d002..5aa592b 100644
>>> --- a/drivers/mmc/fsl_esdhc.c
>>> +++ b/drivers/mmc/fsl_esdhc.c
>>> @@ -342,13 +342,13 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>>>   #endif
>>>   
>>>   	/* Wait for the command to complete */
>>> -	while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | IRQSTAT_CTOE)))
>>> +	while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | CMD_ERR)))
>>>   		;
>>>   
>>>   	irqstat = esdhc_read32(&regs->irqstat);
>>>   
>>>   	/* Reset CMD and DATA portions on error */
>>> -	if (irqstat & (CMD_ERR | IRQSTAT_CTOE)) {
>>> +	if (irqstat & CMD_ERR) {
>>>   		esdhc_write32(&regs->sysctl, esdhc_read32(&regs->sysctl) |
>>>   			      SYSCTL_RSTC);
>>>   		while (esdhc_read32(&regs->sysctl) & SYSCTL_RSTC)
>>> @@ -363,12 +363,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>>>   		}
>>>   	}
>>>   
>>> -	if (irqstat & CMD_ERR)
>>> -		return COMM_ERR;
>>> -
>>>   	if (irqstat & IRQSTAT_CTOE)
>>>   		return TIMEOUT;
>>>   
>>> +	if (irqstat & CMD_ERR)
>>> +		return COMM_ERR;
>>> +
>>>   	/* Workaround for ESDHC errata ENGcm03648 */
>>>   	if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
>>>   		int timeout = 2500;
>>> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
>>> index 67d6057..37dbe27 100644
>>> --- a/include/fsl_esdhc.h
>>> +++ b/include/fsl_esdhc.h
>>> @@ -62,7 +62,8 @@
>>>   #define IRQSTAT_TC		(0x00000002)
>>>   #define IRQSTAT_CC		(0x00000001)
>>>   
>>> -#define CMD_ERR		(IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
>>> +#define CMD_ERR		(IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE | \
>>> +				IRQSTAT_CTOE | IRQSTAT_AC12E)
>>>   #define DATA_ERR	(IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \
>>>   				IRQSTAT_DMAE)
>>>   #define DATA_COMPLETE	(IRQSTAT_TC | IRQSTAT_DINT)
>

-- 
Thanks & Regards
Haijun.

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
  2013-10-21  9:23     ` Zhang Haijun
@ 2013-11-01  7:44       ` Zhang Haijun
  2013-11-01  7:45         ` Pantelis Antoniou
  2014-01-06  3:16         ` Zhang Haijun
  0 siblings, 2 replies; 10+ messages in thread
From: Zhang Haijun @ 2013-11-01  7:44 UTC (permalink / raw)
  To: u-boot


Hi,  Antonious

How about this patch?
Could you give some advice?

? 2013/10/21 17:23, Zhang Haijun ??:
> Hi, Babic
>
> Thanks.
>
> This patch is test on PPC.
>
>
> Regards,
> Haijun
>
>
> ? 2013/10/21 17:19, Stefano Babic ??:
>> Hi,
>>
>> On 21/10/2013 10:23, Zhang Haijun wrote:
>>> Hi, all
>>>
>>> Who can give some comments?
>> I put Antonius in CC, he's the MMC custodian.
>>
>>
>> The driver is for both PPC and i.MX. On which platform do you test these
>> changes ?
>>
>> Best regards,
>> Stefano Babic
>>
>>>
>>> ? 2013/10/12 17:50, Haijun Zhang ??:
>>>> When Auto-CMD12 is used, the corresponding interrupt and error bit
>>>> should be enabled and set to reflect auto cmd 12 error.
>>>> Also add other command error detecting, like command index error,
>>>> CRC error etc. Without this command error bit set system will hang
>>>> due to the while loop.
>>>>
>>>> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
>>>> ---
>>>>   drivers/mmc/fsl_esdhc.c | 10 +++++-----
>>>>   include/fsl_esdhc.h     |  3 ++-
>>>>   2 files changed, 7 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>>>> index dc1d002..5aa592b 100644
>>>> --- a/drivers/mmc/fsl_esdhc.c
>>>> +++ b/drivers/mmc/fsl_esdhc.c
>>>> @@ -342,13 +342,13 @@ esdhc_send_cmd(struct mmc *mmc, struct 
>>>> mmc_cmd *cmd, struct mmc_data *data)
>>>>   #endif
>>>>         /* Wait for the command to complete */
>>>> -    while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | 
>>>> IRQSTAT_CTOE)))
>>>> +    while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | CMD_ERR)))
>>>>           ;
>>>>         irqstat = esdhc_read32(&regs->irqstat);
>>>>         /* Reset CMD and DATA portions on error */
>>>> -    if (irqstat & (CMD_ERR | IRQSTAT_CTOE)) {
>>>> +    if (irqstat & CMD_ERR) {
>>>>           esdhc_write32(&regs->sysctl, esdhc_read32(&regs->sysctl) |
>>>>                     SYSCTL_RSTC);
>>>>           while (esdhc_read32(&regs->sysctl) & SYSCTL_RSTC)
>>>> @@ -363,12 +363,12 @@ esdhc_send_cmd(struct mmc *mmc, struct 
>>>> mmc_cmd *cmd, struct mmc_data *data)
>>>>           }
>>>>       }
>>>>   -    if (irqstat & CMD_ERR)
>>>> -        return COMM_ERR;
>>>> -
>>>>       if (irqstat & IRQSTAT_CTOE)
>>>>           return TIMEOUT;
>>>>   +    if (irqstat & CMD_ERR)
>>>> +        return COMM_ERR;
>>>> +
>>>>       /* Workaround for ESDHC errata ENGcm03648 */
>>>>       if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
>>>>           int timeout = 2500;
>>>> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
>>>> index 67d6057..37dbe27 100644
>>>> --- a/include/fsl_esdhc.h
>>>> +++ b/include/fsl_esdhc.h
>>>> @@ -62,7 +62,8 @@
>>>>   #define IRQSTAT_TC        (0x00000002)
>>>>   #define IRQSTAT_CC        (0x00000001)
>>>>   -#define CMD_ERR        (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
>>>> +#define CMD_ERR        (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE | \
>>>> +                IRQSTAT_CTOE | IRQSTAT_AC12E)
>>>>   #define DATA_ERR    (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \
>>>>                   IRQSTAT_DMAE)
>>>>   #define DATA_COMPLETE    (IRQSTAT_TC | IRQSTAT_DINT)
>>
>

-- 
Thanks & Regards
Haijun.

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
  2013-11-01  7:44       ` Zhang Haijun
@ 2013-11-01  7:45         ` Pantelis Antoniou
  2013-11-01  7:47           ` Zhang Haijun
  2014-01-06  3:16         ` Zhang Haijun
  1 sibling, 1 reply; 10+ messages in thread
From: Pantelis Antoniou @ 2013-11-01  7:45 UTC (permalink / raw)
  To: u-boot

Hi Zhang,

I'll take a look at it over the weekend.

Regards

-- Pantelis

On Nov 1, 2013, at 9:44 AM, Zhang Haijun wrote:

> 
> Hi,  Antonious
> 
> How about this patch?
> Could you give some advice?
> 
> ? 2013/10/21 17:23, Zhang Haijun ??:
>> Hi, Babic
>> 
>> Thanks.
>> 
>> This patch is test on PPC.
>> 
>> 
>> Regards,
>> Haijun
>> 
>> 
>> ? 2013/10/21 17:19, Stefano Babic ??:
>>> Hi,
>>> 
>>> On 21/10/2013 10:23, Zhang Haijun wrote:
>>>> Hi, all
>>>> 
>>>> Who can give some comments?
>>> I put Antonius in CC, he's the MMC custodian.
>>> 
>>> 
>>> The driver is for both PPC and i.MX. On which platform do you test these
>>> changes ?
>>> 
>>> Best regards,
>>> Stefano Babic
>>> 
>>>> 
>>>> ? 2013/10/12 17:50, Haijun Zhang ??:
>>>>> When Auto-CMD12 is used, the corresponding interrupt and error bit
>>>>> should be enabled and set to reflect auto cmd 12 error.
>>>>> Also add other command error detecting, like command index error,
>>>>> CRC error etc. Without this command error bit set system will hang
>>>>> due to the while loop.
>>>>> 
>>>>> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
>>>>> ---
>>>>>  drivers/mmc/fsl_esdhc.c | 10 +++++-----
>>>>>  include/fsl_esdhc.h     |  3 ++-
>>>>>  2 files changed, 7 insertions(+), 6 deletions(-)
>>>>> 
>>>>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>>>>> index dc1d002..5aa592b 100644
>>>>> --- a/drivers/mmc/fsl_esdhc.c
>>>>> +++ b/drivers/mmc/fsl_esdhc.c
>>>>> @@ -342,13 +342,13 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>>>>>  #endif
>>>>>        /* Wait for the command to complete */
>>>>> -    while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | IRQSTAT_CTOE)))
>>>>> +    while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | CMD_ERR)))
>>>>>          ;
>>>>>        irqstat = esdhc_read32(&regs->irqstat);
>>>>>        /* Reset CMD and DATA portions on error */
>>>>> -    if (irqstat & (CMD_ERR | IRQSTAT_CTOE)) {
>>>>> +    if (irqstat & CMD_ERR) {
>>>>>          esdhc_write32(&regs->sysctl, esdhc_read32(&regs->sysctl) |
>>>>>                    SYSCTL_RSTC);
>>>>>          while (esdhc_read32(&regs->sysctl) & SYSCTL_RSTC)
>>>>> @@ -363,12 +363,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>>>>>          }
>>>>>      }
>>>>>  -    if (irqstat & CMD_ERR)
>>>>> -        return COMM_ERR;
>>>>> -
>>>>>      if (irqstat & IRQSTAT_CTOE)
>>>>>          return TIMEOUT;
>>>>>  +    if (irqstat & CMD_ERR)
>>>>> +        return COMM_ERR;
>>>>> +
>>>>>      /* Workaround for ESDHC errata ENGcm03648 */
>>>>>      if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
>>>>>          int timeout = 2500;
>>>>> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
>>>>> index 67d6057..37dbe27 100644
>>>>> --- a/include/fsl_esdhc.h
>>>>> +++ b/include/fsl_esdhc.h
>>>>> @@ -62,7 +62,8 @@
>>>>>  #define IRQSTAT_TC        (0x00000002)
>>>>>  #define IRQSTAT_CC        (0x00000001)
>>>>>  -#define CMD_ERR        (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
>>>>> +#define CMD_ERR        (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE | \
>>>>> +                IRQSTAT_CTOE | IRQSTAT_AC12E)
>>>>>  #define DATA_ERR    (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \
>>>>>                  IRQSTAT_DMAE)
>>>>>  #define DATA_COMPLETE    (IRQSTAT_TC | IRQSTAT_DINT)
>>> 
>> 
> 
> -- 
> Thanks & Regards
> Haijun.
> 
> 

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
  2013-11-01  7:45         ` Pantelis Antoniou
@ 2013-11-01  7:47           ` Zhang Haijun
  2014-01-29 21:14             ` York Sun
  0 siblings, 1 reply; 10+ messages in thread
From: Zhang Haijun @ 2013-11-01  7:47 UTC (permalink / raw)
  To: u-boot

:-)

Thanks.

? 2013/11/1 15:45, Pantelis Antoniou ??:
> Hi Zhang,
>
> I'll take a look at it over the weekend.
>
> Regards
>
> -- Pantelis
>
> On Nov 1, 2013, at 9:44 AM, Zhang Haijun wrote:
>
>> Hi,  Antonious
>>
>> How about this patch?
>> Could you give some advice?
>>
>> ? 2013/10/21 17:23, Zhang Haijun ??:
>>> Hi, Babic
>>>
>>> Thanks.
>>>
>>> This patch is test on PPC.
>>>
>>>
>>> Regards,
>>> Haijun
>>>
>>>
>>> ? 2013/10/21 17:19, Stefano Babic ??:
>>>> Hi,
>>>>
>>>> On 21/10/2013 10:23, Zhang Haijun wrote:
>>>>> Hi, all
>>>>>
>>>>> Who can give some comments?
>>>> I put Antonius in CC, he's the MMC custodian.
>>>>
>>>>
>>>> The driver is for both PPC and i.MX. On which platform do you test these
>>>> changes ?
>>>>
>>>> Best regards,
>>>> Stefano Babic
>>>>
>>>>> ? 2013/10/12 17:50, Haijun Zhang ??:
>>>>>> When Auto-CMD12 is used, the corresponding interrupt and error bit
>>>>>> should be enabled and set to reflect auto cmd 12 error.
>>>>>> Also add other command error detecting, like command index error,
>>>>>> CRC error etc. Without this command error bit set system will hang
>>>>>> due to the while loop.
>>>>>>
>>>>>> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
>>>>>> ---
>>>>>>   drivers/mmc/fsl_esdhc.c | 10 +++++-----
>>>>>>   include/fsl_esdhc.h     |  3 ++-
>>>>>>   2 files changed, 7 insertions(+), 6 deletions(-)
>>>>>>
>>>>>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>>>>>> index dc1d002..5aa592b 100644
>>>>>> --- a/drivers/mmc/fsl_esdhc.c
>>>>>> +++ b/drivers/mmc/fsl_esdhc.c
>>>>>> @@ -342,13 +342,13 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>>>>>>   #endif
>>>>>>         /* Wait for the command to complete */
>>>>>> -    while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | IRQSTAT_CTOE)))
>>>>>> +    while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | CMD_ERR)))
>>>>>>           ;
>>>>>>         irqstat = esdhc_read32(&regs->irqstat);
>>>>>>         /* Reset CMD and DATA portions on error */
>>>>>> -    if (irqstat & (CMD_ERR | IRQSTAT_CTOE)) {
>>>>>> +    if (irqstat & CMD_ERR) {
>>>>>>           esdhc_write32(&regs->sysctl, esdhc_read32(&regs->sysctl) |
>>>>>>                     SYSCTL_RSTC);
>>>>>>           while (esdhc_read32(&regs->sysctl) & SYSCTL_RSTC)
>>>>>> @@ -363,12 +363,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>>>>>>           }
>>>>>>       }
>>>>>>   -    if (irqstat & CMD_ERR)
>>>>>> -        return COMM_ERR;
>>>>>> -
>>>>>>       if (irqstat & IRQSTAT_CTOE)
>>>>>>           return TIMEOUT;
>>>>>>   +    if (irqstat & CMD_ERR)
>>>>>> +        return COMM_ERR;
>>>>>> +
>>>>>>       /* Workaround for ESDHC errata ENGcm03648 */
>>>>>>       if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
>>>>>>           int timeout = 2500;
>>>>>> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
>>>>>> index 67d6057..37dbe27 100644
>>>>>> --- a/include/fsl_esdhc.h
>>>>>> +++ b/include/fsl_esdhc.h
>>>>>> @@ -62,7 +62,8 @@
>>>>>>   #define IRQSTAT_TC        (0x00000002)
>>>>>>   #define IRQSTAT_CC        (0x00000001)
>>>>>>   -#define CMD_ERR        (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
>>>>>> +#define CMD_ERR        (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE | \
>>>>>> +                IRQSTAT_CTOE | IRQSTAT_AC12E)
>>>>>>   #define DATA_ERR    (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \
>>>>>>                   IRQSTAT_DMAE)
>>>>>>   #define DATA_COMPLETE    (IRQSTAT_TC | IRQSTAT_DINT)
>> -- 
>> Thanks & Regards
>> Haijun.
>>
>>
>

-- 
Thanks & Regards
Haijun.

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
  2013-11-01  7:44       ` Zhang Haijun
  2013-11-01  7:45         ` Pantelis Antoniou
@ 2014-01-06  3:16         ` Zhang Haijun
  1 sibling, 0 replies; 10+ messages in thread
From: Zhang Haijun @ 2014-01-06  3:16 UTC (permalink / raw)
  To: u-boot

Hi, Antonious

Expect your advice.

Best Regards,
-- Haijun

On 11/01/2013 03:44 PM, Zhang Haijun wrote:
>
> Hi,  Antonious
>
> How about this patch?
> Could you give some advice?
>
> ? 2013/10/21 17:23, Zhang Haijun ??:
>> Hi, Babic
>>
>> Thanks.
>>
>> This patch is test on PPC.
>>
>>
>> Regards,
>> Haijun
>>
>>
>> ? 2013/10/21 17:19, Stefano Babic ??:
>>> Hi,
>>>
>>> On 21/10/2013 10:23, Zhang Haijun wrote:
>>>> Hi, all
>>>>
>>>> Who can give some comments?
>>> I put Antonius in CC, he's the MMC custodian.
>>>
>>>
>>> The driver is for both PPC and i.MX. On which platform do you test 
>>> these
>>> changes ?
>>>
>>> Best regards,
>>> Stefano Babic
>>>
>>>>
>>>> ? 2013/10/12 17:50, Haijun Zhang ??:
>>>>> When Auto-CMD12 is used, the corresponding interrupt and error bit
>>>>> should be enabled and set to reflect auto cmd 12 error.
>>>>> Also add other command error detecting, like command index error,
>>>>> CRC error etc. Without this command error bit set system will hang
>>>>> due to the while loop.
>>>>>
>>>>> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
>>>>> ---
>>>>>   drivers/mmc/fsl_esdhc.c | 10 +++++-----
>>>>>   include/fsl_esdhc.h     |  3 ++-
>>>>>   2 files changed, 7 insertions(+), 6 deletions(-)
>>>>>
>>>>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>>>>> index dc1d002..5aa592b 100644
>>>>> --- a/drivers/mmc/fsl_esdhc.c
>>>>> +++ b/drivers/mmc/fsl_esdhc.c
>>>>> @@ -342,13 +342,13 @@ esdhc_send_cmd(struct mmc *mmc, struct 
>>>>> mmc_cmd *cmd, struct mmc_data *data)
>>>>>   #endif
>>>>>         /* Wait for the command to complete */
>>>>> -    while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | 
>>>>> IRQSTAT_CTOE)))
>>>>> +    while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC | CMD_ERR)))
>>>>>           ;
>>>>>         irqstat = esdhc_read32(&regs->irqstat);
>>>>>         /* Reset CMD and DATA portions on error */
>>>>> -    if (irqstat & (CMD_ERR | IRQSTAT_CTOE)) {
>>>>> +    if (irqstat & CMD_ERR) {
>>>>>           esdhc_write32(&regs->sysctl, esdhc_read32(&regs->sysctl) |
>>>>>                     SYSCTL_RSTC);
>>>>>           while (esdhc_read32(&regs->sysctl) & SYSCTL_RSTC)
>>>>> @@ -363,12 +363,12 @@ esdhc_send_cmd(struct mmc *mmc, struct 
>>>>> mmc_cmd *cmd, struct mmc_data *data)
>>>>>           }
>>>>>       }
>>>>>   -    if (irqstat & CMD_ERR)
>>>>> -        return COMM_ERR;
>>>>> -
>>>>>       if (irqstat & IRQSTAT_CTOE)
>>>>>           return TIMEOUT;
>>>>>   +    if (irqstat & CMD_ERR)
>>>>> +        return COMM_ERR;
>>>>> +
>>>>>       /* Workaround for ESDHC errata ENGcm03648 */
>>>>>       if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
>>>>>           int timeout = 2500;
>>>>> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
>>>>> index 67d6057..37dbe27 100644
>>>>> --- a/include/fsl_esdhc.h
>>>>> +++ b/include/fsl_esdhc.h
>>>>> @@ -62,7 +62,8 @@
>>>>>   #define IRQSTAT_TC        (0x00000002)
>>>>>   #define IRQSTAT_CC        (0x00000001)
>>>>>   -#define CMD_ERR        (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
>>>>> +#define CMD_ERR        (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE | \
>>>>> +                IRQSTAT_CTOE | IRQSTAT_AC12E)
>>>>>   #define DATA_ERR    (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \
>>>>>                   IRQSTAT_DMAE)
>>>>>   #define DATA_COMPLETE    (IRQSTAT_TC | IRQSTAT_DINT)
>>>
>>
>

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
  2013-11-01  7:47           ` Zhang Haijun
@ 2014-01-29 21:14             ` York Sun
  2014-01-30  6:33               ` Pantelis Antoniou
  0 siblings, 1 reply; 10+ messages in thread
From: York Sun @ 2014-01-29 21:14 UTC (permalink / raw)
  To: u-boot

On 11/01/2013 12:47 AM, Zhang Haijun wrote:
> :-)
> 
> Thanks.
> 
> ? 2013/11/1 15:45, Pantelis Antoniou ??:
>> Hi Zhang,
>>
>> I'll take a look at it over the weekend.
>>
>> Regards
>>
>> -- Pantelis
>>

Where are we on this patch?

York

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting
  2014-01-29 21:14             ` York Sun
@ 2014-01-30  6:33               ` Pantelis Antoniou
  0 siblings, 0 replies; 10+ messages in thread
From: Pantelis Antoniou @ 2014-01-30  6:33 UTC (permalink / raw)
  To: u-boot

Sorry, just had a baby and things are a bit busy.
It's not fallen into the bit-bucket if that's what you're worried about.

Regards

-- Pantelis

On Jan 29, 2014, at 11:14 PM, York Sun wrote:

> On 11/01/2013 12:47 AM, Zhang Haijun wrote:
>> :-)
>> 
>> Thanks.
>> 
>> ? 2013/11/1 15:45, Pantelis Antoniou ??:
>>> Hi Zhang,
>>> 
>>> I'll take a look at it over the weekend.
>>> 
>>> Regards
>>> 
>>> -- Pantelis
>>> 
> 
> Where are we on this patch?
> 
> York
> 

^ permalink raw reply	[flat|nested] 10+ messages in thread
end of thread, other threads:[~2014-01-30  6:33 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-10-12  9:50 [U-Boot] [PATCH] fsl_esdhc: Add Auto command 12 interrupt bit detecting Haijun Zhang
2013-10-21  8:23 ` Zhang Haijun
2013-10-21  9:19   ` Stefano Babic
2013-10-21  9:23     ` Zhang Haijun
2013-11-01  7:44       ` Zhang Haijun
2013-11-01  7:45         ` Pantelis Antoniou
2013-11-01  7:47           ` Zhang Haijun
2014-01-29 21:14             ` York Sun
2014-01-30  6:33               ` Pantelis Antoniou
2014-01-06  3:16         ` Zhang Haijun

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