* [U-Boot] [PATCH v2 1/4] at91: add defines for reset type
2013-11-04 6:40 [U-Boot] [PATCH v2 0/4] arm, at91: support for the taurus, axm and corvus board Heiko Schocher
@ 2013-11-04 6:40 ` Heiko Schocher
2013-11-04 8:16 ` Andreas Bießmann
2013-11-04 19:41 ` [U-Boot] [U-Boot,v2,1/4] " Andreas Bießmann
2013-11-04 6:40 ` [U-Boot] [PATCH v2 2/4] arm, at91: add function for waiting if reset ends Heiko Schocher
` (2 subsequent siblings)
3 siblings, 2 replies; 19+ messages in thread
From: Heiko Schocher @ 2013-11-04 6:40 UTC (permalink / raw)
To: u-boot
From: Roger Meier <r.meier@siemens.com>
Signed-off-by: Roger Meier <r.meier@siemens.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bie?mann <andreas.devel@googlemail.com>
---
changes for v2:
- add Acked-by from Bo Shen
---
arch/arm/include/asm/arch-at91/at91_rstc.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h b/arch/arm/include/asm/arch-at91/at91_rstc.h
index 423cf51..a942342 100644
--- a/arch/arm/include/asm/arch-at91/at91_rstc.h
+++ b/arch/arm/include/asm/arch-at91/at91_rstc.h
@@ -38,4 +38,11 @@ typedef struct at91_rstc {
#define AT91_RSTC_SR_NRSTL 0x00010000
+#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
+#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
+#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
+#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
+#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
+#define AT91_RSTC_RSTTYP_USER (4 << 8)
+
#endif
--
1.8.3.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 1/4] at91: add defines for reset type
2013-11-04 6:40 ` [U-Boot] [PATCH v2 1/4] at91: add defines for reset type Heiko Schocher
@ 2013-11-04 8:16 ` Andreas Bießmann
2013-11-04 19:41 ` [U-Boot] [U-Boot,v2,1/4] " Andreas Bießmann
1 sibling, 0 replies; 19+ messages in thread
From: Andreas Bießmann @ 2013-11-04 8:16 UTC (permalink / raw)
To: u-boot
Hi Heiko,
On 11/04/2013 07:40 AM, Heiko Schocher wrote:
> From: Roger Meier <r.meier@siemens.com>
>
> Signed-off-by: Roger Meier <r.meier@siemens.com>
> Acked-by: Bo Shen <voice.shen@atmel.com>
> Reviewed-by: Heiko Schocher <hs@denx.de>
> Cc: Andreas Bie?mann <andreas.devel@googlemail.com>
>
> ---
> changes for v2:
> - add Acked-by from Bo Shen
> ---
> arch/arm/include/asm/arch-at91/at91_rstc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h b/arch/arm/include/asm/arch-at91/at91_rstc.h
> index 423cf51..a942342 100644
> --- a/arch/arm/include/asm/arch-at91/at91_rstc.h
> +++ b/arch/arm/include/asm/arch-at91/at91_rstc.h
> @@ -38,4 +38,11 @@ typedef struct at91_rstc {
>
> #define AT91_RSTC_SR_NRSTL 0x00010000
>
> +#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
> +#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
> +#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
> +#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
> +#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
> +#define AT91_RSTC_RSTTYP_USER (4 << 8)
> +
> #endif
>
... looks good to me.
Best regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 19+ messages in thread* [U-Boot] [U-Boot,v2,1/4] at91: add defines for reset type
2013-11-04 6:40 ` [U-Boot] [PATCH v2 1/4] at91: add defines for reset type Heiko Schocher
2013-11-04 8:16 ` Andreas Bießmann
@ 2013-11-04 19:41 ` Andreas Bießmann
1 sibling, 0 replies; 19+ messages in thread
From: Andreas Bießmann @ 2013-11-04 19:41 UTC (permalink / raw)
To: u-boot
Dear Heiko Schocher,
Heiko Schocher <hs@denx.de> writes:
>From: Roger Meier <r.meier@siemens.com>
>
>Signed-off-by: Roger Meier <r.meier@siemens.com>
>Acked-by: Bo Shen <voice.shen@atmel.com>
>Reviewed-by: Heiko Schocher <hs@denx.de>
>Cc: Andreas Bie?mann <andreas.devel@googlemail.com>
>
>---
>changes for v2:
> - add Acked-by from Bo Shen
>---
> arch/arm/include/asm/arch-at91/at91_rstc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH v2 2/4] arm, at91: add function for waiting if reset ends
2013-11-04 6:40 [U-Boot] [PATCH v2 0/4] arm, at91: support for the taurus, axm and corvus board Heiko Schocher
2013-11-04 6:40 ` [U-Boot] [PATCH v2 1/4] at91: add defines for reset type Heiko Schocher
@ 2013-11-04 6:40 ` Heiko Schocher
2013-11-04 8:20 ` Andreas Bießmann
2013-11-04 9:03 ` Wolfgang Denk
2013-11-04 6:40 ` [U-Boot] [PATCH v2 3/4] arm, at91: add Siemens board taurus and axm Heiko Schocher
2013-11-04 6:40 ` [U-Boot] [PATCH v2 4/4] arm, at91: add siemens corvus board Heiko Schocher
3 siblings, 2 replies; 19+ messages in thread
From: Heiko Schocher @ 2013-11-04 6:40 UTC (permalink / raw)
To: u-boot
add function for waiting if reset ends. If reset never ends,
timeout and print an error message.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Bo Shen <voice.shen@atmel.com>
Cc: Andreas Bie?mann <andreas.devel@googlemail.com>
---
- changes for v2:
- new in v2
---
arch/arm/cpu/arm926ejs/at91/reset.c | 15 +++++++++++++++
arch/arm/include/asm/arch-at91/at91_rstc.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/at91/reset.c b/arch/arm/cpu/arm926ejs/at91/reset.c
index e67f47b..03b661c 100644
--- a/arch/arm/cpu/arm926ejs/at91/reset.c
+++ b/arch/arm/cpu/arm926ejs/at91/reset.c
@@ -27,3 +27,18 @@ void reset_cpu(ulong ignored)
while (1)
;
}
+
+void at91_wait_for_reset(int timeout)
+{
+ struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
+ int count = 0;
+
+ while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) {
+ if (count >= timeout) {
+ printf("reset timeout.\n");
+ return;
+ }
+ udelay(10);
+ timeout++;
+ }
+}
diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h b/arch/arm/include/asm/arch-at91/at91_rstc.h
index a942342..7f4e59f 100644
--- a/arch/arm/include/asm/arch-at91/at91_rstc.h
+++ b/arch/arm/include/asm/arch-at91/at91_rstc.h
@@ -23,6 +23,7 @@ typedef struct at91_rstc {
u32 mr; /* Reset Controller Mode Register */
} at91_rstc_t;
+void at91_wait_for_reset(int timeout);
#endif /* __ASSEMBLY__ */
#define AT91_RSTC_KEY 0xA5000000
--
1.8.3.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 2/4] arm, at91: add function for waiting if reset ends
2013-11-04 6:40 ` [U-Boot] [PATCH v2 2/4] arm, at91: add function for waiting if reset ends Heiko Schocher
@ 2013-11-04 8:20 ` Andreas Bießmann
2013-11-04 9:03 ` Wolfgang Denk
1 sibling, 0 replies; 19+ messages in thread
From: Andreas Bießmann @ 2013-11-04 8:20 UTC (permalink / raw)
To: u-boot
Hi Heiko,
On 11/04/2013 07:40 AM, Heiko Schocher wrote:
> add function for waiting if reset ends. If reset never ends,
> timeout and print an error message.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Bo Shen <voice.shen@atmel.com>
> Cc: Andreas Bie?mann <andreas.devel@googlemail.com>
>
> ---
> - changes for v2:
> - new in v2
> ---
> arch/arm/cpu/arm926ejs/at91/reset.c | 15 +++++++++++++++
> arch/arm/include/asm/arch-at91/at91_rstc.h | 1 +
> 2 files changed, 16 insertions(+)
>
> diff --git a/arch/arm/cpu/arm926ejs/at91/reset.c b/arch/arm/cpu/arm926ejs/at91/reset.c
> index e67f47b..03b661c 100644
> --- a/arch/arm/cpu/arm926ejs/at91/reset.c
> +++ b/arch/arm/cpu/arm926ejs/at91/reset.c
> @@ -27,3 +27,18 @@ void reset_cpu(ulong ignored)
> while (1)
> ;
> }
> +
> +void at91_wait_for_reset(int timeout)
this looks like millisecond timeout.
> +{
> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
> + int count = 0;
> +
> + while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) {
> + if (count >= timeout) {
> + printf("reset timeout.\n");
> + return;
> + }
> + udelay(10);
> + timeout++;
> + }
> +}
> diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h b/arch/arm/include/asm/arch-at91/at91_rstc.h
> index a942342..7f4e59f 100644
> --- a/arch/arm/include/asm/arch-at91/at91_rstc.h
> +++ b/arch/arm/include/asm/arch-at91/at91_rstc.h
> @@ -23,6 +23,7 @@ typedef struct at91_rstc {
> u32 mr; /* Reset Controller Mode Register */
> } at91_rstc_t;
>
Could you please add kernel-doc style documentation here to point that out?
> +void at91_wait_for_reset(int timeout);
> #endif /* __ASSEMBLY__ */
>
> #define AT91_RSTC_KEY 0xA5000000
>
Best regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 2/4] arm, at91: add function for waiting if reset ends
2013-11-04 6:40 ` [U-Boot] [PATCH v2 2/4] arm, at91: add function for waiting if reset ends Heiko Schocher
2013-11-04 8:20 ` Andreas Bießmann
@ 2013-11-04 9:03 ` Wolfgang Denk
2013-11-04 9:11 ` Heiko Schocher
2013-11-04 10:35 ` Andreas Bießmann
1 sibling, 2 replies; 19+ messages in thread
From: Wolfgang Denk @ 2013-11-04 9:03 UTC (permalink / raw)
To: u-boot
Dear Heiko,
In message <1383547247-7017-3-git-send-email-hs@denx.de> you wrote:
> add function for waiting if reset ends. If reset never ends,
> timeout and print an error message.
I think this patch needs some rework.
First, I think we should point out in the commit mnessage that we're
not talking about a general hardware reset here (how could the code
be running if the CPU was helt in reset?), but that we are actually
talking about the PHY reset.
> arch/arm/cpu/arm926ejs/at91/reset.c | 15 +++++++++++++++
> arch/arm/include/asm/arch-at91/at91_rstc.h | 1 +
> 2 files changed, 16 insertions(+)
Second, while I highly appreciate your effort to identify and factor
out common code, we should then actually use this new common function
to replace all the occurrences of that common code - i. e. I would
expect to see modifications at least in the following files:
board/BuS/vl_ma2sc/vl_ma2sc.c
board/afeb9260/afeb9260.c
board/atmel/at91sam9260ek/at91sam9260ek.c
board/atmel/at91sam9263ek/at91sam9263ek.c
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
board/bluewater/snapper9260/snapper9260.c
board/calao/sbc35_a9g20/sbc35_a9g20.c
board/eukrea/cpu9260/cpu9260.c
board/taskit/stamp9g20/stamp9g20.c
Third, I think we should not only replace the waiting for the end og
the PHY reset loop (and add a timeout to it), but instead we should
factor out the whole block of code performing the PHY reset. From
what I've seen, the following piece of code is repeated identical
(except for formatting) in all these files:
erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
/* Need to reset PHY -> 500ms reset */
writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
AT91_RSTC_MR_URSTEN, &rstc->mr);
writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
/* Wait for end hardware reset */
while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
;
/* Restore NRST value */
writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
&rstc->mr);
So we should factor out all of this (and probably call the function
at91_phy_reset() then?).
Are thwere any AT91 experts out there who actually understand this
code? In my (very limited) understanding, NRST is the "microcon-
troller reset pin", so "Wait for end hardware reset" (and polling
AT91_RSTC_SR_NRSTL) does not make much sense - how could this code be
running if the microprocessor was helt in reset? After asserting the
AT91_RSTC_CR_EXTRST (external reset) we are probably waiting for
something else?
> +void at91_wait_for_reset(int timeout)
> +{
> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
> + int count = 0;
> +
> + while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) {
> + if (count >= timeout) {
> + printf("reset timeout.\n");
> + return;
> + }
> + udelay(10);
> + timeout++;
> + }
> +}
Finally, you should fix the code so that it really times out - this
code will not, as you initialize count as zero and then wait for
"count >= timeout", but you never change "count"; instead you
increment "timeout", so you might have to wait for up to INT_MAX * 10
us or about 6 hours...
^ permalink raw reply [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 2/4] arm, at91: add function for waiting if reset ends
2013-11-04 9:03 ` Wolfgang Denk
@ 2013-11-04 9:11 ` Heiko Schocher
2013-11-04 10:35 ` Andreas Bießmann
1 sibling, 0 replies; 19+ messages in thread
From: Heiko Schocher @ 2013-11-04 9:11 UTC (permalink / raw)
To: u-boot
Hello Wolfgang,
Am 04.11.2013 10:03, schrieb Wolfgang Denk:
> Dear Heiko,
>
> In message<1383547247-7017-3-git-send-email-hs@denx.de> you wrote:
>> add function for waiting if reset ends. If reset never ends,
>> timeout and print an error message.
>
> I think this patch needs some rework.
>
> First, I think we should point out in the commit mnessage that we're
> not talking about a general hardware reset here (how could the code
> be running if the CPU was helt in reset?), but that we are actually
> talking about the PHY reset.
>
>> arch/arm/cpu/arm926ejs/at91/reset.c | 15 +++++++++++++++
>> arch/arm/include/asm/arch-at91/at91_rstc.h | 1 +
>> 2 files changed, 16 insertions(+)
>
> Second, while I highly appreciate your effort to identify and factor
> out common code, we should then actually use this new common function
> to replace all the occurrences of that common code - i. e. I would
> expect to see modifications at least in the following files:
>
> board/BuS/vl_ma2sc/vl_ma2sc.c
> board/afeb9260/afeb9260.c
> board/atmel/at91sam9260ek/at91sam9260ek.c
> board/atmel/at91sam9263ek/at91sam9263ek.c
> board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
> board/bluewater/snapper9260/snapper9260.c
> board/calao/sbc35_a9g20/sbc35_a9g20.c
> board/eukrea/cpu9260/cpu9260.c
> board/taskit/stamp9g20/stamp9g20.c
Yep, full ack, do this in the next version
> Third, I think we should not only replace the waiting for the end og
> the PHY reset loop (and add a timeout to it), but instead we should
> factor out the whole block of code performing the PHY reset. From
> what I've seen, the following piece of code is repeated identical
> (except for formatting) in all these files:
>
> erstl = readl(&rstc->mr)& AT91_RSTC_MR_ERSTL_MASK;
>
> /* Need to reset PHY -> 500ms reset */
> writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
> AT91_RSTC_MR_URSTEN,&rstc->mr);
>
> writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST,&rstc->cr);
>
> /* Wait for end hardware reset */
> while (!(readl(&rstc->sr)& AT91_RSTC_SR_NRSTL))
> ;
>
> /* Restore NRST value */
> writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
> &rstc->mr);
>
> So we should factor out all of this (and probably call the function
> at91_phy_reset() then?).
Yes.
> Are thwere any AT91 experts out there who actually understand this
> code? In my (very limited) understanding, NRST is the "microcon-
> troller reset pin", so "Wait for end hardware reset" (and polling
> AT91_RSTC_SR_NRSTL) does not make much sense - how could this code be
> running if the microprocessor was helt in reset? After asserting the
> AT91_RSTC_CR_EXTRST (external reset) we are probably waiting for
> something else?
Good question!
>> +void at91_wait_for_reset(int timeout)
>> +{
>> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
>> + int count = 0;
>> +
>> + while (!(readl(&rstc->sr)& AT91_RSTC_SR_NRSTL)) {
>> + if (count>= timeout) {
>> + printf("reset timeout.\n");
>> + return;
>> + }
>> + udelay(10);
>> + timeout++;
>> + }
>> +}
>
> Finally, you should fix the code so that it really times out - this
> code will not, as you initialize count as zero and then wait for
> "count>= timeout", but you never change "count"; instead you
> increment "timeout", so you might have to wait for up to INT_MAX * 10
> us or about 6 hours...
Good catch! Thanks
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 2/4] arm, at91: add function for waiting if reset ends
2013-11-04 9:03 ` Wolfgang Denk
2013-11-04 9:11 ` Heiko Schocher
@ 2013-11-04 10:35 ` Andreas Bießmann
1 sibling, 0 replies; 19+ messages in thread
From: Andreas Bießmann @ 2013-11-04 10:35 UTC (permalink / raw)
To: u-boot
Dear Wolfgang,
On 11/04/2013 10:03 AM, Wolfgang Denk wrote:
> In message <1383547247-7017-3-git-send-email-hs@denx.de> you wrote:
>> add function for waiting if reset ends. If reset never ends,
>> timeout and print an error message.
>
> I think this patch needs some rework.
>
> First, I think we should point out in the commit mnessage that we're
> not talking about a general hardware reset here (how could the code
> be running if the CPU was helt in reset?), but that we are actually
> talking about the PHY reset.
>
>> arch/arm/cpu/arm926ejs/at91/reset.c | 15 +++++++++++++++
>> arch/arm/include/asm/arch-at91/at91_rstc.h | 1 +
>> 2 files changed, 16 insertions(+)
>
> Second, while I highly appreciate your effort to identify and factor
> out common code, we should then actually use this new common function
> to replace all the occurrences of that common code - i. e. I would
> expect to see modifications at least in the following files:
>
> board/BuS/vl_ma2sc/vl_ma2sc.c
> board/afeb9260/afeb9260.c
> board/atmel/at91sam9260ek/at91sam9260ek.c
> board/atmel/at91sam9263ek/at91sam9263ek.c
> board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
> board/bluewater/snapper9260/snapper9260.c
> board/calao/sbc35_a9g20/sbc35_a9g20.c
> board/eukrea/cpu9260/cpu9260.c
> board/taskit/stamp9g20/stamp9g20.c
Full ACK.
> Third, I think we should not only replace the waiting for the end og
> the PHY reset loop (and add a timeout to it), but instead we should
> factor out the whole block of code performing the PHY reset. From
> what I've seen, the following piece of code is repeated identical
> (except for formatting) in all these files:
>
> erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
Get and save the length of reset pulse.
>
> /* Need to reset PHY -> 500ms reset */
> writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
> AT91_RSTC_MR_URSTEN, &rstc->mr);
Setup reset pulse for nearly 500ms (2^(13 + 1) slow clock cycles),
disable user reset interrupt but enable the user reset.
>
> writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
perform the external reset (but no processor nor internal peripherial)
IOW pull the NRST line low.
>
> /* Wait for end hardware reset */
> while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
> ;
Read the status register until the reset line NRST has high level.
>
> /* Restore NRST value */
> writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
> &rstc->mr);
restore pulse length
>
> So we should factor out all of this (and probably call the function
> at91_phy_reset() then?).
Full ACK.
> Are thwere any AT91 experts out there who actually understand this
> code? In my (very limited) understanding, NRST is the "microcon-
> troller reset pin", so "Wait for end hardware reset" (and polling
> AT91_RSTC_SR_NRSTL) does not make much sense - how could this code be
> running if the microprocessor was helt in reset? After asserting the
> AT91_RSTC_CR_EXTRST (external reset) we are probably waiting for
> something else?
Please read above. AT91 can setup the reset target (core, peripherial,
external pin). We do only pull the line but do not reset the CPU nor
internal peripherial.
>
>> +void at91_wait_for_reset(int timeout)
>> +{
>> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
>> + int count = 0;
>> +
>> + while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) {
>> + if (count >= timeout) {
>> + printf("reset timeout.\n");
>> + return;
>> + }
>> + udelay(10);
>> + timeout++;
>> + }
>> +}
>
> Finally, you should fix the code so that it really times out - this
> code will not, as you initialize count as zero and then wait for
> "count >= timeout", but you never change "count"; instead you
> increment "timeout", so you might have to wait for up to INT_MAX * 10
> us or about 6 hours...
good catch!
Best regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH v2 3/4] arm, at91: add Siemens board taurus and axm
2013-11-04 6:40 [U-Boot] [PATCH v2 0/4] arm, at91: support for the taurus, axm and corvus board Heiko Schocher
2013-11-04 6:40 ` [U-Boot] [PATCH v2 1/4] at91: add defines for reset type Heiko Schocher
2013-11-04 6:40 ` [U-Boot] [PATCH v2 2/4] arm, at91: add function for waiting if reset ends Heiko Schocher
@ 2013-11-04 6:40 ` Heiko Schocher
2013-11-04 8:43 ` Andreas Bießmann
2013-11-04 6:40 ` [U-Boot] [PATCH v2 4/4] arm, at91: add siemens corvus board Heiko Schocher
3 siblings, 1 reply; 19+ messages in thread
From: Heiko Schocher @ 2013-11-04 6:40 UTC (permalink / raw)
To: u-boot
enable support for the siemens AT91SAM9G20 based boards taurus
and axm.
Signed-off-by: Roger Meier <r.meier@siemens.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bie?mann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
---
- changes for v2:
- add comments from bo shen
- use gpio api
- remove unneccessary comment
- use at91_wait_for_reset()
- remove unneccessary code in board file
- Coding Style cleanup (tabs and unneccessary 1 after config define
removed)
- add commit message
- add comments from Andreas Bie?mann <andreas.devel@googlemail.com>:
- detect sdram size on startup without read dram setting
- get rid of MACH_TYPE definition in config file
---
board/siemens/taurus/Makefile | 38 +++++++++
board/siemens/taurus/taurus.c | 186 ++++++++++++++++++++++++++++++++++++++++++
boards.cfg | 2 +
include/configs/taurus.h | 159 ++++++++++++++++++++++++++++++++++++
4 files changed, 385 insertions(+)
create mode 100644 board/siemens/taurus/Makefile
create mode 100644 board/siemens/taurus/taurus.c
create mode 100644 include/configs/taurus.h
diff --git a/board/siemens/taurus/Makefile b/board/siemens/taurus/Makefile
new file mode 100644
index 0000000..9c288b7
--- /dev/null
+++ b/board/siemens/taurus/Makefile
@@ -0,0 +1,38 @@
+#
+# Makefile for Siemens TAURUS (AT91SAM9G20) based board
+# (C) Copyright 2013 Siemens AG
+#
+# Based on:
+# U-Boot file: board/atmel/at91sam9260ek/Makefile
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop <stelian@popies.net>
+# Lead Tech Design <www.leadtechdesign.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS-y += taurus.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
new file mode 100644
index 0000000..66d55d6
--- /dev/null
+++ b/board/siemens/taurus/taurus.c
@@ -0,0 +1,186 @@
+/*
+ * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
+ * (C) Copyright Siemens AG
+ *
+ * Based on:
+ * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
+ *
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91sam9260_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91sam9_sdramc.h>
+#include <atmel_mci.h>
+
+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
+# include <net.h>
+#endif
+#include <netdev.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_CMD_NAND
+static void taurus_nand_hw_init(void)
+{
+ struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+ struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+ unsigned long csa;
+
+ /* Assign CS3 to NAND/SmartMedia Interface */
+ csa = readl(&matrix->ebicsa);
+ csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
+ writel(csa, &matrix->ebicsa);
+
+ /* Configure SMC CS3 for NAND/SmartMedia */
+ writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
+ AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
+ &smc->cs[3].setup);
+ writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
+ AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
+ &smc->cs[3].pulse);
+ writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
+ &smc->cs[3].cycle);
+ writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+ AT91_SMC_MODE_EXNW_DISABLE |
+ AT91_SMC_MODE_DBW_8 |
+ AT91_SMC_MODE_TDF_CYCLE(3),
+ &smc->cs[3].mode);
+
+ /* Configure RDY/BSY */
+ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+
+ /* Enable NandFlash */
+ at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+}
+#endif
+
+#ifdef CONFIG_MACB
+static void taurus_macb_hw_init(void)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+ struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
+ unsigned long erstl;
+
+ /* Enable EMAC clock */
+ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
+
+ /*
+ * Disable pull-up on:
+ * RXDV (PA17) => PHY normal mode (not Test mode)
+ * ERX0 (PA14) => PHY ADDR0
+ * ERX1 (PA15) => PHY ADDR1
+ * ERX2 (PA25) => PHY ADDR2
+ * ERX3 (PA26) => PHY ADDR3
+ * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
+ *
+ * PHY has internal pull-down
+ */
+ at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
+
+ /*
+ * Need to reset PHY ?-> 200us reset
+ * Bug within Atmel CPU (undefined initial states on io-lines)!
+ * Startup Ethernet Switch delayed so that hardstrap(Switch Config)
+ * has defined state after cold start (do not break daisy chain!).
+ */
+ if ((readl(&rstc->sr) & AT91_RSTC_RSTTYP) == AT91_RSTC_RSTTYP_GENERAL)
+ at91_set_gpio_output(AT91_PIN_PA25, 0);
+
+
+ erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
+
+ /* Need to reset PHY -> 500ms reset */
+ writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
+ AT91_RSTC_MR_URSTEN, &rstc->mr);
+
+ writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
+
+ /* Wait for end of reset */
+ at91_wait_for_reset(100);
+
+ /* Restore NRST value */
+ writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
+
+ at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
+
+ /* Re-enable pull-up */
+ at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
+
+ /* Initialize EMAC=MACB hardware */
+ at91_macb_hw_init();
+}
+#endif
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+int board_mmc_init(bd_t *bd)
+{
+ at91_mci_hw_init();
+
+ return atmel_mci_init((void *)ATMEL_BASE_MCI);
+}
+#endif
+
+int board_early_init_f(void)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+ /* Enable clocks for all PIOs */
+ writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
+ (1 << ATMEL_ID_PIOC),
+ &pmc->pcer);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ at91_seriald_hw_init();
+#ifdef CONFIG_CMD_NAND
+ taurus_nand_hw_init();
+#endif
+#ifdef CONFIG_MACB
+ taurus_macb_hw_init();
+#endif
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_MACB
+ rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
+#endif
+ return rc;
+}
diff --git a/boards.cfg b/boards.cfg
index aa2ee64..0fe98d0 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -139,6 +139,8 @@ Active arm arm926ejs at91 ronetix pm9263
Active arm arm926ejs at91 ronetix pm9g45 pm9g45 pm9g45:AT91SAM9G45 Ilko Iliev <iliev@ronetix.at>
Active arm arm926ejs at91 taskit stamp9g20 portuxg20 stamp9g20:AT91SAM9G20,PORTUXG20 Markus Hubig <mhubig@imko.de>
Active arm arm926ejs at91 taskit stamp9g20 stamp9g20 stamp9g20:AT91SAM9G20 Markus Hubig <mhubig@imko.de>
+Active arm arm926ejs at91 siemens taurus axm taurus:AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM Heiko Schocher <hs@denx.de>
+Active arm arm926ejs at91 siemens taurus taurus taurus:AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS Heiko Schocher <hs@denx.de>
Active arm arm926ejs davinci ait cam_enc_4xx cam_enc_4xx cam_enc_4xx Heiko Schocher <hs@denx.de>
Active arm arm926ejs davinci Barix ipam390 ipam390 - Heiko Schocher <hs@denx.de>
Active arm arm926ejs davinci davinci da8xxevm da830evm - Nick Thompson <nick.thompson@gefanuc.com>
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
new file mode 100644
index 0000000..26255bb
--- /dev/null
+++ b/include/configs/taurus.h
@@ -0,0 +1,159 @@
+/*
+ * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
+ * (C) Copyright 2013 Siemens AG
+ *
+ * Based on:
+ * U-Boot file: include/configs/at91sam9260ek.h
+ *
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
+
+#define MACH_TYPE_TAURUS 2067
+#define MACH_TYPE_AXM 2068
+
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * adapting the initial boot program.
+ * Since the linker has to swallow that define, we must use a pure
+ * hex number here!
+ */
+
+
+#define CONFIG_SYS_TEXT_BASE 0x23f00000
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
+#define CONFIG_SYS_HZ 1000
+
+/* Misc CPU related */
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_OF_LIBFDT
+
+/* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
+#define CONFIG_AT91_GPIO
+#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CONFIG_USART_ID ATMEL_ID_SYS
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_BOOTDELAY 3
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_SOURCE
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NAND
+
+/*
+ * SDRAM: 1 bank, min 32, max 128 MB
+ * Initialized before u-boot gets started.
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
+#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
+
+/*
+ * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
+ * leaving the correct space for initial global data structure above
+ * that address while providing maximum stack area below.
+ */
+# define CONFIG_SYS_INIT_SP_ADDR \
+ (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
+/* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
+#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
+#endif
+
+/* NOR flash - no real flash on this board */
+#define CONFIG_SYS_NO_FLASH 1
+
+/* Ethernet */
+#define CONFIG_MACB
+#define CONFIG_RMII
+
+/* USB */
+#if defined(CONFIG_BOARD_TAURUS)
+#define CONFIG_USB_ATMEL
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_STORAGE
+#endif
+
+/* load address */
+#define CONFIG_SYS_LOAD_ADDR 0x22000000
+
+/* bootstrap in spi flash , u-boot + env + linux in nandflash */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET 0x100000
+#define CONFIG_ENV_OFFSET_REDUND 0x180000
+#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
+#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
+#define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 earlyprintk " \
+ "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
+ "256k(env),256k(env_redundant),256k(spare)," \
+ "512k(dtb),6M(kernel)ro,-(rootfs) " \
+ "root=/dev/mtdblock7 rw rootfstype=jffs2"
+
+#define CONFIG_SYS_PROMPT "U-Boot> "
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_PBSIZE \
+ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN \
+ ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
+
+#endif
--
1.8.3.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 3/4] arm, at91: add Siemens board taurus and axm
2013-11-04 6:40 ` [U-Boot] [PATCH v2 3/4] arm, at91: add Siemens board taurus and axm Heiko Schocher
@ 2013-11-04 8:43 ` Andreas Bießmann
2013-11-04 9:09 ` Heiko Schocher
0 siblings, 1 reply; 19+ messages in thread
From: Andreas Bießmann @ 2013-11-04 8:43 UTC (permalink / raw)
To: u-boot
On 11/04/2013 07:40 AM, Heiko Schocher wrote:
> enable support for the siemens AT91SAM9G20 based boards taurus
> and axm.
>
> Signed-off-by: Roger Meier <r.meier@siemens.com>
> Reviewed-by: Heiko Schocher <hs@denx.de>
> Cc: Andreas Bie?mann <andreas.devel@googlemail.com>
> Cc: Bo Shen <voice.shen@atmel.com>
>
> ---
> - changes for v2:
> - add comments from bo shen
> - use gpio api
> - remove unneccessary comment
> - use at91_wait_for_reset()
> - remove unneccessary code in board file
> - Coding Style cleanup (tabs and unneccessary 1 after config define
> removed)
> - add commit message
> - add comments from Andreas Bie?mann <andreas.devel@googlemail.com>:
> - detect sdram size on startup without read dram setting
> - get rid of MACH_TYPE definition in config file
> ---
> board/siemens/taurus/Makefile | 38 +++++++++
> board/siemens/taurus/taurus.c | 186 ++++++++++++++++++++++++++++++++++++++++++
> boards.cfg | 2 +
> include/configs/taurus.h | 159 ++++++++++++++++++++++++++++++++++++
> 4 files changed, 385 insertions(+)
> create mode 100644 board/siemens/taurus/Makefile
> create mode 100644 board/siemens/taurus/taurus.c
> create mode 100644 include/configs/taurus.h
>
> diff --git a/board/siemens/taurus/Makefile b/board/siemens/taurus/Makefile
> new file mode 100644
> index 0000000..9c288b7
> --- /dev/null
> +++ b/board/siemens/taurus/Makefile
> @@ -0,0 +1,38 @@
> +#
> +# Makefile for Siemens TAURUS (AT91SAM9G20) based board
> +# (C) Copyright 2013 Siemens AG
> +#
> +# Based on:
> +# U-Boot file: board/atmel/at91sam9260ek/Makefile
> +#
> +# (C) Copyright 2003-2008
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# (C) Copyright 2008
> +# Stelian Pop <stelian@popies.net>
> +# Lead Tech Design <www.leadtechdesign.com>
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).o
> +
> +COBJS-y += taurus.o
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS-y))
> +SOBJS := $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
> + $(call cmd_link_o_target, $(OBJS) $(SOBJS))
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
> new file mode 100644
> index 0000000..66d55d6
> --- /dev/null
> +++ b/board/siemens/taurus/taurus.c
> @@ -0,0 +1,186 @@
> +/*
> + * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
> + * (C) Copyright Siemens AG
> + *
> + * Based on:
> + * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
> + *
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian@popies.net>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/at91sam9260_matrix.h>
> +#include <asm/arch/at91sam9_smc.h>
> +#include <asm/arch/at91_common.h>
> +#include <asm/arch/at91_pmc.h>
> +#include <asm/arch/at91_rstc.h>
> +#include <asm/arch/gpio.h>
> +#include <asm/arch/at91sam9_sdramc.h>
> +#include <atmel_mci.h>
> +
> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
minor complaint: I think we can include net.h unconditionally here.
> +# include <net.h>
> +#endif
> +#include <netdev.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#ifdef CONFIG_CMD_NAND
> +static void taurus_nand_hw_init(void)
> +{
> + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
> + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
> + unsigned long csa;
> +
> + /* Assign CS3 to NAND/SmartMedia Interface */
> + csa = readl(&matrix->ebicsa);
> + csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
> + writel(csa, &matrix->ebicsa);
> +
> + /* Configure SMC CS3 for NAND/SmartMedia */
> + writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
> + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
> + &smc->cs[3].setup);
> + writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
> + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
> + &smc->cs[3].pulse);
> + writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
> + &smc->cs[3].cycle);
> + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
> + AT91_SMC_MODE_EXNW_DISABLE |
> + AT91_SMC_MODE_DBW_8 |
> + AT91_SMC_MODE_TDF_CYCLE(3),
> + &smc->cs[3].mode);
> +
> + /* Configure RDY/BSY */
> + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
> +
> + /* Enable NandFlash */
> + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
> +}
> +#endif
> +
> +#ifdef CONFIG_MACB
> +static void taurus_macb_hw_init(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
> + unsigned long erstl;
> +
> + /* Enable EMAC clock */
> + writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
Is it required to enable the MACB clock before PHY reset? It will be
done later on in at91_macb_hw_init() in any case.
> +
> + /*
> + * Disable pull-up on:
> + * RXDV (PA17) => PHY normal mode (not Test mode)
> + * ERX0 (PA14) => PHY ADDR0
> + * ERX1 (PA15) => PHY ADDR1
> + * ERX2 (PA25) => PHY ADDR2
> + * ERX3 (PA26) => PHY ADDR3
> + * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
> + *
> + * PHY has internal pull-down
> + */
> + at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
I'm a bit unhappy with this.
As sayed before I'd like to switch the 'ATMEL_LEGACY' PIO API to be the
new one. Would it be Ok for you to wait a few days for me to prepare the
API for all pio features to be able to feed with a single pin input?
Beside that I said to provide some PIO API with PORT + MASK input. I
still think that would be useful but I do not plan to work on that for
this release. I'd be happy if you could do that, but changing it later
is also Ok for me.
> +
> + /*
> + * Need to reset PHY ?-> 200us reset
> + * Bug within Atmel CPU (undefined initial states on io-lines)!
> + * Startup Ethernet Switch delayed so that hardstrap(Switch Config)
> + * has defined state after cold start (do not break daisy chain!).
> + */
> + if ((readl(&rstc->sr) & AT91_RSTC_RSTTYP) == AT91_RSTC_RSTTYP_GENERAL)
> + at91_set_gpio_output(AT91_PIN_PA25, 0);
> +
> +
One empty line could be left out.
> + erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
> +
> + /* Need to reset PHY -> 500ms reset */
> + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
> + AT91_RSTC_MR_URSTEN, &rstc->mr);
> +
> + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
> +
> + /* Wait for end of reset */
> + at91_wait_for_reset(100);
> +
> + /* Restore NRST value */
> + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
> +
> + at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
> +
> + /* Re-enable pull-up */
> + at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
> +
> + /* Initialize EMAC=MACB hardware */
> + at91_macb_hw_init();
> +}
> +#endif
> +
> +#ifdef CONFIG_GENERIC_ATMEL_MCI
> +int board_mmc_init(bd_t *bd)
> +{
> + at91_mci_hw_init();
> +
> + return atmel_mci_init((void *)ATMEL_BASE_MCI);
> +}
> +#endif
> +
> +int board_early_init_f(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +
> + /* Enable clocks for all PIOs */
> + writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
> + (1 << ATMEL_ID_PIOC),
> + &pmc->pcer);
> +
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> + /* adress of boot parameters */
> + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> +
> + at91_seriald_hw_init();
I think enabling debug output in early_init is more useful than here.
> +#ifdef CONFIG_CMD_NAND
> + taurus_nand_hw_init();
> +#endif
> +#ifdef CONFIG_MACB
> + taurus_macb_hw_init();
> +#endif
> +
> + return 0;
> +}
> +
> +int dram_init(void)
> +{
> + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
> + CONFIG_SYS_SDRAM_SIZE);
> + return 0;
> +}
> +
> +int board_eth_init(bd_t *bis)
> +{
> + int rc = 0;
> +#ifdef CONFIG_MACB
> + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
> +#endif
> + return rc;
> +}
> diff --git a/boards.cfg b/boards.cfg
> index aa2ee64..0fe98d0 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -139,6 +139,8 @@ Active arm arm926ejs at91 ronetix pm9263
> Active arm arm926ejs at91 ronetix pm9g45 pm9g45 pm9g45:AT91SAM9G45 Ilko Iliev <iliev@ronetix.at>
> Active arm arm926ejs at91 taskit stamp9g20 portuxg20 stamp9g20:AT91SAM9G20,PORTUXG20 Markus Hubig <mhubig@imko.de>
> Active arm arm926ejs at91 taskit stamp9g20 stamp9g20 stamp9g20:AT91SAM9G20 Markus Hubig <mhubig@imko.de>
> +Active arm arm926ejs at91 siemens taurus axm taurus:AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM Heiko Schocher <hs@denx.de>
> +Active arm arm926ejs at91 siemens taurus taurus taurus:AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS Heiko Schocher <hs@denx.de>
> Active arm arm926ejs davinci ait cam_enc_4xx cam_enc_4xx cam_enc_4xx Heiko Schocher <hs@denx.de>
> Active arm arm926ejs davinci Barix ipam390 ipam390 - Heiko Schocher <hs@denx.de>
> Active arm arm926ejs davinci davinci da8xxevm da830evm - Nick Thompson <nick.thompson@gefanuc.com>
> diff --git a/include/configs/taurus.h b/include/configs/taurus.h
> new file mode 100644
> index 0000000..26255bb
> --- /dev/null
> +++ b/include/configs/taurus.h
> @@ -0,0 +1,159 @@
> +/*
> + * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
> + * (C) Copyright 2013 Siemens AG
> + *
> + * Based on:
> + * U-Boot file: include/configs/at91sam9260ek.h
> + *
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian@popies.net>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*
> + * SoC must be defined first, before hardware.h is included.
> + * In this case SoC is defined in boards.cfg.
> + */
> +#include <asm/hardware.h>
> +
> +#define MACH_TYPE_TAURUS 2067
> +#define MACH_TYPE_AXM 2068
> +
> +/*
> + * Warning: changing CONFIG_SYS_TEXT_BASE requires
> + * adapting the initial boot program.
> + * Since the linker has to swallow that define, we must use a pure
> + * hex number here!
> + */
> +
> +
> +#define CONFIG_SYS_TEXT_BASE 0x23f00000
> +
> +/* ARM asynchronous clock */
> +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
> +#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
> +#define CONFIG_SYS_HZ 1000
> +
> +/* Misc CPU related */
> +#define CONFIG_ARCH_CPU_INIT
> +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_INITRD_TAG
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_DISPLAY_CPUINFO
> +
> +#define CONFIG_CMD_BOOTZ
> +#define CONFIG_OF_LIBFDT
> +
> +/* general purpose I/O */
> +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
> +#define CONFIG_AT91_GPIO
> +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
> +
> +/* serial console */
> +#define CONFIG_ATMEL_USART
> +#define CONFIG_USART_BASE ATMEL_BASE_DBGU
> +#define CONFIG_USART_ID ATMEL_ID_SYS
> +#define CONFIG_BAUDRATE 115200
> +
> +#define CONFIG_BOOTDELAY 3
> +
> +/*
> + * Command line configuration.
> + */
> +#include <config_cmd_default.h>
> +#undef CONFIG_CMD_BDI
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_IMI
> +#undef CONFIG_CMD_IMLS
> +#undef CONFIG_CMD_LOADS
> +#undef CONFIG_CMD_SOURCE
> +
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_NAND
> +
> +/*
> + * SDRAM: 1 bank, min 32, max 128 MB
> + * Initialized before u-boot gets started.
> + */
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
> +#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
> +
> +/*
> + * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
> + * leaving the correct space for initial global data structure above
> + * that address while providing maximum stack area below.
> + */
> +# define CONFIG_SYS_INIT_SP_ADDR \
> + (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
> +
> +/* NAND flash */
> +#ifdef CONFIG_CMD_NAND
> +#define CONFIG_NAND_ATMEL
> +#define CONFIG_SYS_MAX_NAND_DEVICE 1
> +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
> +#define CONFIG_SYS_NAND_DBW_8
> +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
> +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
> +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
> +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
> +#endif
> +
> +/* NOR flash - no real flash on this board */
> +#define CONFIG_SYS_NO_FLASH 1
> +
> +/* Ethernet */
> +#define CONFIG_MACB
> +#define CONFIG_RMII
> +
> +/* USB */
> +#if defined(CONFIG_BOARD_TAURUS)
> +#define CONFIG_USB_ATMEL
> +#define CONFIG_USB_OHCI_NEW
> +#define CONFIG_SYS_USB_OHCI_CPU_INIT
> +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
> +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
> +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2LEGA
What does '2LEGA' mean here?
> +#define CONFIG_USB_STORAGE
> +#endif
> +
> +/* load address */
> +#define CONFIG_SYS_LOAD_ADDR 0x22000000
> +
> +/* bootstrap in spi flash , u-boot + env + linux in nandflash */
> +#define CONFIG_ENV_IS_IN_NAND
> +#define CONFIG_ENV_OFFSET 0x100000
> +#define CONFIG_ENV_OFFSET_REDUND 0x180000
> +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
> +#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
> +#define CONFIG_BOOTARGS \
> + "console=ttyS0,115200 earlyprintk " \
> + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
> + "256k(env),256k(env_redundant),256k(spare)," \
> + "512k(dtb),6M(kernel)ro,-(rootfs) " \
> + "root=/dev/mtdblock7 rw rootfstype=jffs2"
> +
> +#define CONFIG_SYS_PROMPT "U-Boot> "
> +#define CONFIG_SYS_CBSIZE 256
> +#define CONFIG_SYS_MAXARGS 16
> +#define CONFIG_SYS_PBSIZE \
> + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_LONGHELP
> +#define CONFIG_CMDLINE_EDITING
> +#define CONFIG_AUTO_COMPLETE
> +
> +/*
> + * Size of malloc() pool
> + */
> +#define CONFIG_SYS_MALLOC_LEN \
> + ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
> +
> +#endif
>
Best regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 3/4] arm, at91: add Siemens board taurus and axm
2013-11-04 8:43 ` Andreas Bießmann
@ 2013-11-04 9:09 ` Heiko Schocher
2013-11-04 11:04 ` Andreas Bießmann
0 siblings, 1 reply; 19+ messages in thread
From: Heiko Schocher @ 2013-11-04 9:09 UTC (permalink / raw)
To: u-boot
Hello Andreas,
Am 04.11.2013 09:43, schrieb Andreas Bie?mann:
> On 11/04/2013 07:40 AM, Heiko Schocher wrote:
>> enable support for the siemens AT91SAM9G20 based boards taurus
>> and axm.
>>
>> Signed-off-by: Roger Meier<r.meier@siemens.com>
>> Reviewed-by: Heiko Schocher<hs@denx.de>
>> Cc: Andreas Bie?mann<andreas.devel@googlemail.com>
>> Cc: Bo Shen<voice.shen@atmel.com>
>>
>> ---
>> - changes for v2:
>> - add comments from bo shen
>> - use gpio api
>> - remove unneccessary comment
>> - use at91_wait_for_reset()
>> - remove unneccessary code in board file
>> - Coding Style cleanup (tabs and unneccessary 1 after config define
>> removed)
>> - add commit message
>> - add comments from Andreas Bie?mann<andreas.devel@googlemail.com>:
>> - detect sdram size on startup without read dram setting
>> - get rid of MACH_TYPE definition in config file
>> ---
>> board/siemens/taurus/Makefile | 38 +++++++++
>> board/siemens/taurus/taurus.c | 186 ++++++++++++++++++++++++++++++++++++++++++
>> boards.cfg | 2 +
>> include/configs/taurus.h | 159 ++++++++++++++++++++++++++++++++++++
>> 4 files changed, 385 insertions(+)
>> create mode 100644 board/siemens/taurus/Makefile
>> create mode 100644 board/siemens/taurus/taurus.c
>> create mode 100644 include/configs/taurus.h
>>
>> diff --git a/board/siemens/taurus/Makefile b/board/siemens/taurus/Makefile
>> new file mode 100644
>> index 0000000..9c288b7
>> --- /dev/null
>> +++ b/board/siemens/taurus/Makefile
[...]
>> diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
>> new file mode 100644
>> index 0000000..66d55d6
>> --- /dev/null
>> +++ b/board/siemens/taurus/taurus.c
>> @@ -0,0 +1,186 @@
>> +/*
>> + * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
>> + * (C) Copyright Siemens AG
>> + *
>> + * Based on:
>> + * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
>> + *
>> + * (C) Copyright 2007-2008
>> + * Stelian Pop<stelian@popies.net>
>> + * Lead Tech Design<www.leadtechdesign.com>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include<common.h>
>> +#include<asm/io.h>
>> +#include<asm/arch/at91sam9260_matrix.h>
>> +#include<asm/arch/at91sam9_smc.h>
>> +#include<asm/arch/at91_common.h>
>> +#include<asm/arch/at91_pmc.h>
>> +#include<asm/arch/at91_rstc.h>
>> +#include<asm/arch/gpio.h>
>> +#include<asm/arch/at91sam9_sdramc.h>
>> +#include<atmel_mci.h>
>> +
>> +#if defined(CONFIG_RESET_PHY_R)&& defined(CONFIG_MACB)
>
> minor complaint: I think we can include net.h unconditionally here.
removed.
>> +# include<net.h>
>> +#endif
>> +#include<netdev.h>
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +#ifdef CONFIG_CMD_NAND
>> +static void taurus_nand_hw_init(void)
>> +{
>> + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
>> + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
>> + unsigned long csa;
>> +
>> + /* Assign CS3 to NAND/SmartMedia Interface */
>> + csa = readl(&matrix->ebicsa);
>> + csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
>> + writel(csa,&matrix->ebicsa);
>> +
>> + /* Configure SMC CS3 for NAND/SmartMedia */
>> + writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
>> + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
>> + &smc->cs[3].setup);
>> + writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
>> + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
>> + &smc->cs[3].pulse);
>> + writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
>> + &smc->cs[3].cycle);
>> + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
>> + AT91_SMC_MODE_EXNW_DISABLE |
>> + AT91_SMC_MODE_DBW_8 |
>> + AT91_SMC_MODE_TDF_CYCLE(3),
>> + &smc->cs[3].mode);
>> +
>> + /* Configure RDY/BSY */
>> + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
>> +
>> + /* Enable NandFlash */
>> + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
>> +}
>> +#endif
>> +
>> +#ifdef CONFIG_MACB
>> +static void taurus_macb_hw_init(void)
>> +{
>> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
>> + unsigned long erstl;
>> +
>> + /* Enable EMAC clock */
>> + writel(1<< ATMEL_ID_EMAC0,&pmc->pcer);
>
> Is it required to enable the MACB clock before PHY reset? It will be
> done later on in at91_macb_hw_init() in any case.
Hmm.. this is done in more at91 boards ... Hmm.. seems we should
look, if we can make this function common? If I see this correct,
only the pin setup is board specific, or?
>> +
>> + /*
>> + * Disable pull-up on:
>> + * RXDV (PA17) => PHY normal mode (not Test mode)
>> + * ERX0 (PA14) => PHY ADDR0
>> + * ERX1 (PA15) => PHY ADDR1
>> + * ERX2 (PA25) => PHY ADDR2
>> + * ERX3 (PA26) => PHY ADDR3
>> + * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
>> + *
>> + * PHY has internal pull-down
>> + */
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
>
> I'm a bit unhappy with this.
> As sayed before I'd like to switch the 'ATMEL_LEGACY' PIO API to be the
> new one. Would it be Ok for you to wait a few days for me to prepare the
> API for all pio features to be able to feed with a single pin input?
Ok for me. You can send me your patches, so I can test them?
> Beside that I said to provide some PIO API with PORT + MASK input. I
> still think that would be useful but I do not plan to work on that for
> this release. I'd be happy if you could do that, but changing it later
> is also Ok for me.
>
>> +
>> + /*
>> + * Need to reset PHY ?-> 200us reset
>> + * Bug within Atmel CPU (undefined initial states on io-lines)!
>> + * Startup Ethernet Switch delayed so that hardstrap(Switch Config)
>> + * has defined state after cold start (do not break daisy chain!).
>> + */
>> + if ((readl(&rstc->sr)& AT91_RSTC_RSTTYP) == AT91_RSTC_RSTTYP_GENERAL)
>> + at91_set_gpio_output(AT91_PIN_PA25, 0);
>> +
>> +
>
> One empty line could be left out.
removed.
>> + erstl = readl(&rstc->mr)& AT91_RSTC_MR_ERSTL_MASK;
>> +
>> + /* Need to reset PHY -> 500ms reset */
>> + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
>> + AT91_RSTC_MR_URSTEN,&rstc->mr);
>> +
>> + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST,&rstc->cr);
>> +
>> + /* Wait for end of reset */
>> + at91_wait_for_reset(100);
>> +
>> + /* Restore NRST value */
>> + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,&rstc->mr);
>> +
>> + at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
>> +
>> + /* Re-enable pull-up */
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
>> +
>> + /* Initialize EMAC=MACB hardware */
>> + at91_macb_hw_init();
>> +}
>> +#endif
[...]
>> +int board_init(void)
>> +{
>> + /* adress of boot parameters */
>> + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>> +
>> + at91_seriald_hw_init();
>
> I think enabling debug output in early_init is more useful than here.
moved.
[...]
>> diff --git a/include/configs/taurus.h b/include/configs/taurus.h
>> new file mode 100644
>> index 0000000..26255bb
>> --- /dev/null
>> +++ b/include/configs/taurus.h
>> @@ -0,0 +1,159 @@
>> +/*
>> + * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
>> + * (C) Copyright 2013 Siemens AG
>> + *
>> + * Based on:
>> + * U-Boot file: include/configs/at91sam9260ek.h
>> + *
>> + * (C) Copyright 2007-2008
>> + * Stelian Pop<stelian@popies.net>
>> + * Lead Tech Design<www.leadtechdesign.com>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#ifndef __CONFIG_H
>> +#define __CONFIG_H
>> +
>> +/*
>> + * SoC must be defined first, before hardware.h is included.
>> + * In this case SoC is defined in boards.cfg.
>> + */
>> +#include<asm/hardware.h>
>> +
>> +#define MACH_TYPE_TAURUS 2067
>> +#define MACH_TYPE_AXM 2068
>> +
>> +/*
>> + * Warning: changing CONFIG_SYS_TEXT_BASE requires
>> + * adapting the initial boot program.
>> + * Since the linker has to swallow that define, we must use a pure
>> + * hex number here!
>> + */
>> +
>> +
>> +#define CONFIG_SYS_TEXT_BASE 0x23f00000
>> +
>> +/* ARM asynchronous clock */
>> +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
>> +#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
>> +#define CONFIG_SYS_HZ 1000
>> +
>> +/* Misc CPU related */
>> +#define CONFIG_ARCH_CPU_INIT
>> +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
>> +#define CONFIG_SETUP_MEMORY_TAGS
>> +#define CONFIG_INITRD_TAG
>> +#define CONFIG_SKIP_LOWLEVEL_INIT
>> +#define CONFIG_BOARD_EARLY_INIT_F
>> +#define CONFIG_DISPLAY_CPUINFO
>> +
>> +#define CONFIG_CMD_BOOTZ
>> +#define CONFIG_OF_LIBFDT
>> +
>> +/* general purpose I/O */
>> +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
>> +#define CONFIG_AT91_GPIO
>> +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
>> +
>> +/* serial console */
>> +#define CONFIG_ATMEL_USART
>> +#define CONFIG_USART_BASE ATMEL_BASE_DBGU
>> +#define CONFIG_USART_ID ATMEL_ID_SYS
>> +#define CONFIG_BAUDRATE 115200
>> +
>> +#define CONFIG_BOOTDELAY 3
>> +
>> +/*
>> + * Command line configuration.
>> + */
>> +#include<config_cmd_default.h>
>> +#undef CONFIG_CMD_BDI
>> +#undef CONFIG_CMD_FPGA
>> +#undef CONFIG_CMD_IMI
>> +#undef CONFIG_CMD_IMLS
>> +#undef CONFIG_CMD_LOADS
>> +#undef CONFIG_CMD_SOURCE
>> +
>> +#define CONFIG_CMD_PING
>> +#define CONFIG_CMD_DHCP
>> +#define CONFIG_CMD_NAND
>> +
>> +/*
>> + * SDRAM: 1 bank, min 32, max 128 MB
>> + * Initialized before u-boot gets started.
>> + */
>> +#define CONFIG_NR_DRAM_BANKS 1
>> +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
>> +#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
>> +
>> +/*
>> + * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
>> + * leaving the correct space for initial global data structure above
>> + * that address while providing maximum stack area below.
>> + */
>> +# define CONFIG_SYS_INIT_SP_ADDR \
>> + (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
>> +
>> +/* NAND flash */
>> +#ifdef CONFIG_CMD_NAND
>> +#define CONFIG_NAND_ATMEL
>> +#define CONFIG_SYS_MAX_NAND_DEVICE 1
>> +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
>> +#define CONFIG_SYS_NAND_DBW_8
>> +#define CONFIG_SYS_NAND_MASK_ALE (1<< 21)
>> +#define CONFIG_SYS_NAND_MASK_CLE (1<< 22)
>> +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
>> +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
>> +#endif
>> +
>> +/* NOR flash - no real flash on this board */
>> +#define CONFIG_SYS_NO_FLASH 1
>> +
>> +/* Ethernet */
>> +#define CONFIG_MACB
>> +#define CONFIG_RMII
>> +
>> +/* USB */
>> +#if defined(CONFIG_BOARD_TAURUS)
>> +#define CONFIG_USB_ATMEL
>> +#define CONFIG_USB_OHCI_NEW
>> +#define CONFIG_SYS_USB_OHCI_CPU_INIT
>> +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
>> +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
>> +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2LEGA
>
> What does '2LEGA' mean here?
Hups... This should be:
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Hmm... I do not find this in my patch file I send with git-sendmail
Also in the mailarchive:
http://lists.denx.de/pipermail/u-boot/2013-November/166040.html
I could not find "2LEGA" ...
But in Patchwork, there is a "2LEGA" ...
http://patchwork.ozlabs.org/patch/288117/
It seems, thats something introduced from you?
>> +#define CONFIG_USB_STORAGE
>> +#endif
>> +
>> +/* load address */
>> +#define CONFIG_SYS_LOAD_ADDR 0x22000000
>> +
>> +/* bootstrap in spi flash , u-boot + env + linux in nandflash */
>> +#define CONFIG_ENV_IS_IN_NAND
>> +#define CONFIG_ENV_OFFSET 0x100000
>> +#define CONFIG_ENV_OFFSET_REDUND 0x180000
>> +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
>> +#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
>> +#define CONFIG_BOOTARGS \
>> + "console=ttyS0,115200 earlyprintk " \
>> + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
>> + "256k(env),256k(env_redundant),256k(spare)," \
>> + "512k(dtb),6M(kernel)ro,-(rootfs) " \
>> + "root=/dev/mtdblock7 rw rootfstype=jffs2"
>> +
>> +#define CONFIG_SYS_PROMPT "U-Boot> "
>> +#define CONFIG_SYS_CBSIZE 256
>> +#define CONFIG_SYS_MAXARGS 16
>> +#define CONFIG_SYS_PBSIZE \
>> + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
>> +#define CONFIG_SYS_LONGHELP
>> +#define CONFIG_CMDLINE_EDITING
>> +#define CONFIG_AUTO_COMPLETE
>> +
>> +/*
>> + * Size of malloc() pool
>> + */
>> +#define CONFIG_SYS_MALLOC_LEN \
>> + ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
>> +
>> +#endif
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 3/4] arm, at91: add Siemens board taurus and axm
2013-11-04 9:09 ` Heiko Schocher
@ 2013-11-04 11:04 ` Andreas Bießmann
0 siblings, 0 replies; 19+ messages in thread
From: Andreas Bießmann @ 2013-11-04 11:04 UTC (permalink / raw)
To: u-boot
Hello Heiko,
On 11/04/2013 10:09 AM, Heiko Schocher wrote:
> Am 04.11.2013 09:43, schrieb Andreas Bie?mann:
>> On 11/04/2013 07:40 AM, Heiko Schocher wrote:
<snip>
>>> +#ifdef CONFIG_MACB
>>> +static void taurus_macb_hw_init(void)
>>> +{
>>> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>>> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
>>> + unsigned long erstl;
>>> +
>>> + /* Enable EMAC clock */
>>> + writel(1<< ATMEL_ID_EMAC0,&pmc->pcer);
>>
>> Is it required to enable the MACB clock before PHY reset? It will be
>> done later on in at91_macb_hw_init() in any case.
>
> Hmm.. this is done in more at91 boards ... Hmm.. seems we should
> look, if we can make this function common? If I see this correct,
> only the pin setup is board specific, or?
That's true.
How could we provide the gpio setup to a common function then?
I think we should go with some at91_phy_reset() which should preferably
run before enabling the (e)macb (would that be true for
CONFIG_RESET_PHY_R?).
I haven't checked it but think it would be Ok to enable the (e)macb
peripheral clock when enabling the peripheral. Therefore the 'Enable
EMAC clock' above could be removed. _All_ at91_macb_hw_init() should
therefore enable the peripheral clock ... unfortunately some do not at
the moment.
<snip>
>>> +/* USB */
>>> +#if defined(CONFIG_BOARD_TAURUS)
>>> +#define CONFIG_USB_ATMEL
>>> +#define CONFIG_USB_OHCI_NEW
>>> +#define CONFIG_SYS_USB_OHCI_CPU_INIT
>>> +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
>>> +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
>>> +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2LEGA
>>
>> What does '2LEGA' mean here?
>
> Hups... This should be:
>
> #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
>
> Hmm... I do not find this in my patch file I send with git-sendmail
>
> Also in the mailarchive:
> http://lists.denx.de/pipermail/u-boot/2013-November/166040.html
>
> I could not find "2LEGA" ...
>
> But in Patchwork, there is a "2LEGA" ...
>
> http://patchwork.ozlabs.org/patch/288117/
I can't find it in the patch ...
>
> It seems, thats something introduced from you?
Yea, maybe some cursor jump around in MUA while writing 'ATMEL_LEGACY'.
Sorry for the trouble.
Best regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH v2 4/4] arm, at91: add siemens corvus board
2013-11-04 6:40 [U-Boot] [PATCH v2 0/4] arm, at91: support for the taurus, axm and corvus board Heiko Schocher
` (2 preceding siblings ...)
2013-11-04 6:40 ` [U-Boot] [PATCH v2 3/4] arm, at91: add Siemens board taurus and axm Heiko Schocher
@ 2013-11-04 6:40 ` Heiko Schocher
2013-11-04 8:53 ` Andreas Bießmann
3 siblings, 1 reply; 19+ messages in thread
From: Heiko Schocher @ 2013-11-04 6:40 UTC (permalink / raw)
To: u-boot
enable support for the siemens AT91SAM9G20 based board corvus.
Signed-off-by: Boris Schmidt <boris.schmidt@siemens.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bie?mann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
---
- changes for v2:
- add comments from Bo Shen
- use gpio api
- remove unneccessary comment
- use at91_wait_for_reset()
- remove unneccessary code in board file
- Coding Style cleanup (tabs and unneccessary 1 after config define
removed, use ".xxx = x" notation for initializing structs)
- remove reset_phy()
- remove CONFIG_SYS_MEMTEST_x defines, as mtest command
is not used on this board.
- changes load address
- delete lcd support
- add comments from Andreas Bie?mann:
- rearrange some init calls
- remove some unneeded ifdef
---
board/siemens/corvus/Makefile | 39 ++++++++
board/siemens/corvus/board.c | 216 ++++++++++++++++++++++++++++++++++++++++++
boards.cfg | 1 +
include/configs/corvus.h | 165 ++++++++++++++++++++++++++++++++
4 files changed, 421 insertions(+)
create mode 100644 board/siemens/corvus/Makefile
create mode 100644 board/siemens/corvus/board.c
create mode 100644 include/configs/corvus.h
diff --git a/board/siemens/corvus/Makefile b/board/siemens/corvus/Makefile
new file mode 100644
index 0000000..88981d8
--- /dev/null
+++ b/board/siemens/corvus/Makefile
@@ -0,0 +1,39 @@
+#
+# Makefile for siemens CORVUS (AT91SAM9G45) based board
+# (C) Copyright 2013 Siemens AG
+#
+# Based on:
+# U-Boot file: board/atmel/at91sam9m10g45ek/Makefile
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop <stelian@popies.net>
+# Lead Tech Design <www.leadtechdesign.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS-y += board.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
new file mode 100644
index 0000000..11f0d49
--- /dev/null
+++ b/board/siemens/corvus/board.c
@@ -0,0 +1,216 @@
+/*
+ * Board functions for Siemens CORVUS (AT91SAM9G45) based board
+ * (C) Copyright 2013 Siemens AG
+ *
+ * Based on:
+ * U-Boot file: board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91sam9g45_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/clk.h>
+#include <lcd.h>
+#include <atmel_lcdc.h>
+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
+#include <net.h>
+#endif
+#include <netdev.h>
+#include <spi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_CMD_NAND
+static void corvus_nand_hw_init(void)
+{
+ struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+ struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+ unsigned long csa;
+
+ /* Enable CS3 */
+ csa = readl(&matrix->ebicsa);
+ csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
+ writel(csa, &matrix->ebicsa);
+
+ /* Configure SMC CS3 for NAND/SmartMedia */
+ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+ AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+ &smc->cs[3].setup);
+ writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
+ AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
+ &smc->cs[3].pulse);
+ writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
+ &smc->cs[3].cycle);
+ writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+ AT91_SMC_MODE_EXNW_DISABLE |
+#ifdef CONFIG_SYS_NAND_DBW_16
+ AT91_SMC_MODE_DBW_16 |
+#else /* CONFIG_SYS_NAND_DBW_8 */
+ AT91_SMC_MODE_DBW_8 |
+#endif
+ AT91_SMC_MODE_TDF_CYCLE(3),
+ &smc->cs[3].mode);
+
+ writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
+
+ /* Configure RDY/BSY */
+ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+
+ /* Enable NandFlash */
+ at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+}
+#endif
+
+#ifdef CONFIG_CMD_USB
+static void at91sam9m10g45ek_usb_hw_init(void)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+ writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
+
+ at91_set_gpio_output(AT91_PIN_PD1, 0);
+ at91_set_gpio_output(AT91_PIN_PD3, 0);
+}
+#endif
+
+#ifdef CONFIG_MACB
+static void corvus_macb_hw_init(void)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+ struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
+ unsigned long erstl;
+
+ /* Enable clock */
+ writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+
+ /*
+ * Disable pull-up on:
+ * RXDV (PA15) => PHY normal mode (not Test mode)
+ * ERX0 (PA12) => PHY ADDR0
+ * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
+ *
+ * PHY has internal pull-down
+ */
+ at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
+
+ erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
+
+ /* Need to reset PHY -> 500ms reset */
+ writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
+ AT91_RSTC_MR_URSTEN, &rstc->mr);
+
+ writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
+
+ /* Wait for end of reset */
+ at91_wait_for_reset(100);
+
+ /* Restore NRST value */
+ writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
+ &rstc->mr);
+
+ /* Re-enable pull-up */
+ at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
+ at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
+
+ /* And the pins. */
+ at91_macb_hw_init();
+}
+#endif
+
+int board_early_init_f(void)
+{
+ at91_seriald_hw_init();
+ return 0;
+}
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_CMD_NAND
+ corvus_nand_hw_init();
+#endif
+#ifdef CONFIG_ATMEL_SPI
+ at91_spi0_hw_init(1 << 4);
+#endif
+#ifdef CONFIG_HAS_DATAFLASH
+ at91_spi0_hw_init(1 << 0);
+#endif
+#ifdef CONFIG_MACB
+ corvus_macb_hw_init();
+#endif
+#ifdef CONFIG_CMD_USB
+ at91sam9m10g45ek_usb_hw_init();
+#endif
+ return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void reset_phy(void)
+{
+}
+#endif
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_MACB
+ rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
+#endif
+ return rc;
+}
+
+/* SPI chip select control */
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return bus == 0 && cs < 2;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ switch (slave->cs) {
+ case 1:
+ at91_set_gpio_output(AT91_PIN_PB18, 0);
+ break;
+ case 0:
+ default:
+ at91_set_gpio_output(AT91_PIN_PB3, 0);
+ break;
+ }
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ switch (slave->cs) {
+ case 1:
+ at91_set_gpio_output(AT91_PIN_PB18, 1);
+ break;
+ case 0:
+ default:
+ at91_set_gpio_output(AT91_PIN_PB3, 1);
+ break;
+ }
+}
diff --git a/boards.cfg b/boards.cfg
index 0fe98d0..a207e4a 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -140,6 +140,7 @@ Active arm arm926ejs at91 ronetix pm9g45
Active arm arm926ejs at91 taskit stamp9g20 portuxg20 stamp9g20:AT91SAM9G20,PORTUXG20 Markus Hubig <mhubig@imko.de>
Active arm arm926ejs at91 taskit stamp9g20 stamp9g20 stamp9g20:AT91SAM9G20 Markus Hubig <mhubig@imko.de>
Active arm arm926ejs at91 siemens taurus axm taurus:AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM Heiko Schocher <hs@denx.de>
+Active arm arm926ejs at91 siemens corvus corvus corvus:AT91SAM9M10G45,SYS_USE_NANDFLASH Heiko Schocher <hs@denx.de>
Active arm arm926ejs at91 siemens taurus taurus taurus:AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS Heiko Schocher <hs@denx.de>
Active arm arm926ejs davinci ait cam_enc_4xx cam_enc_4xx cam_enc_4xx Heiko Schocher <hs@denx.de>
Active arm arm926ejs davinci Barix ipam390 ipam390 - Heiko Schocher <hs@denx.de>
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
new file mode 100644
index 0000000..b864562
--- /dev/null
+++ b/include/configs/corvus.h
@@ -0,0 +1,165 @@
+/*
+ * Common board functions for siemens AT91SAM9G45 based boards
+ * (C) Copyright 2013 Siemens AG
+ *
+ * Based on:
+ * U-Boot file: include/configs/at91sam9m10g45ek.h
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/hardware.h>
+
+#define MACH_TYPE_CORVUS 2066
+
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * adapting the initial boot program.
+ * Since the linker has to swallow that define, we must use a pure
+ * hex number here!
+ */
+
+#define CONFIG_SYS_TEXT_BASE 0x73f00000
+
+#define CONFIG_AT91_LEGACY
+#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
+#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_AT91FAMILY
+
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_OF_LIBFDT
+
+/* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
+#define CONFIG_AT91_GPIO
+#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CONFIG_USART_ID ATMEL_ID_SYS
+
+/* LED */
+#define CONFIG_AT91_LED
+#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
+#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
+
+#define CONFIG_BOOTDELAY 3
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_LOADS
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_USB
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
+#define CONFIG_SYS_SDRAM_SIZE 0x08000000
+
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+
+/* No NOR flash */
+#define CONFIG_SYS_NO_FLASH
+
+/* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_DBW_8
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
+
+#endif
+
+/* Ethernet */
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_RETRY_COUNT 20
+#define CONFIG_RESET_PHY_R
+
+/* USB */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
+#define CONFIG_DOS_PARTITION
+#define CONFIG_USB_STORAGE
+
+#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */
+
+/* bootstrap + u-boot + env in nandflash */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET 0x100000
+#define CONFIG_ENV_OFFSET_REDUND 0x180000
+#define CONFIG_ENV_SIZE 0x20000
+
+#define CONFIG_BOOTCOMMAND \
+ "nand read 0x70000000 0x200000 0x300000;" \
+ "bootm 0x70000000"
+#define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 earlyprintk " \
+ "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
+ "256k(env),256k(env_redundant),256k(spare)," \
+ "512k(dtb),6M(kernel)ro,-(rootfs) " \
+ "root=/dev/mtdblock7 rw rootfstype=jffs2"
+
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_SYS_PROMPT "U-Boot> "
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
+ 128*1024, 0x1000)
+
+#endif
--
1.8.3.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 4/4] arm, at91: add siemens corvus board
2013-11-04 6:40 ` [U-Boot] [PATCH v2 4/4] arm, at91: add siemens corvus board Heiko Schocher
@ 2013-11-04 8:53 ` Andreas Bießmann
2013-11-04 9:53 ` Heiko Schocher
0 siblings, 1 reply; 19+ messages in thread
From: Andreas Bießmann @ 2013-11-04 8:53 UTC (permalink / raw)
To: u-boot
Hi Heiko,
On 11/04/2013 07:40 AM, Heiko Schocher wrote:
> enable support for the siemens AT91SAM9G20 based board corvus.
>
> Signed-off-by: Boris Schmidt <boris.schmidt@siemens.com>
> Reviewed-by: Heiko Schocher <hs@denx.de>
> Cc: Andreas Bie?mann <andreas.devel@googlemail.com>
> Cc: Bo Shen <voice.shen@atmel.com>
>
> ---
> - changes for v2:
> - add comments from Bo Shen
> - use gpio api
> - remove unneccessary comment
> - use at91_wait_for_reset()
> - remove unneccessary code in board file
> - Coding Style cleanup (tabs and unneccessary 1 after config define
> removed, use ".xxx = x" notation for initializing structs)
> - remove reset_phy()
> - remove CONFIG_SYS_MEMTEST_x defines, as mtest command
> is not used on this board.
> - changes load address
> - delete lcd support
> - add comments from Andreas Bie?mann:
> - rearrange some init calls
> - remove some unneeded ifdef
> ---
> board/siemens/corvus/Makefile | 39 ++++++++
> board/siemens/corvus/board.c | 216 ++++++++++++++++++++++++++++++++++++++++++
> boards.cfg | 1 +
> include/configs/corvus.h | 165 ++++++++++++++++++++++++++++++++
> 4 files changed, 421 insertions(+)
> create mode 100644 board/siemens/corvus/Makefile
> create mode 100644 board/siemens/corvus/board.c
> create mode 100644 include/configs/corvus.h
>
> diff --git a/board/siemens/corvus/Makefile b/board/siemens/corvus/Makefile
> new file mode 100644
> index 0000000..88981d8
> --- /dev/null
> +++ b/board/siemens/corvus/Makefile
> @@ -0,0 +1,39 @@
> +#
> +# Makefile for siemens CORVUS (AT91SAM9G45) based board
> +# (C) Copyright 2013 Siemens AG
> +#
> +# Based on:
> +# U-Boot file: board/atmel/at91sam9m10g45ek/Makefile
> +#
> +# (C) Copyright 2003-2008
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# (C) Copyright 2008
> +# Stelian Pop <stelian@popies.net>
> +# Lead Tech Design <www.leadtechdesign.com>
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).o
> +
> +COBJS-y += board.o
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS-y))
> +SOBJS := $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
> + $(call cmd_link_o_target, $(OBJS) $(SOBJS))
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
> new file mode 100644
> index 0000000..11f0d49
> --- /dev/null
> +++ b/board/siemens/corvus/board.c
> @@ -0,0 +1,216 @@
> +/*
> + * Board functions for Siemens CORVUS (AT91SAM9G45) based board
> + * (C) Copyright 2013 Siemens AG
> + *
> + * Based on:
> + * U-Boot file: board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian@popies.net>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/at91sam9g45_matrix.h>
> +#include <asm/arch/at91sam9_smc.h>
> +#include <asm/arch/at91_common.h>
> +#include <asm/arch/at91_pmc.h>
> +#include <asm/arch/at91_rstc.h>
> +#include <asm/arch/gpio.h>
> +#include <asm/arch/clk.h>
> +#include <lcd.h>
> +#include <atmel_lcdc.h>
> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
> +#include <net.h>
> +#endif
> +#include <netdev.h>
> +#include <spi.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#ifdef CONFIG_CMD_NAND
> +static void corvus_nand_hw_init(void)
> +{
> + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
> + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> + unsigned long csa;
> +
> + /* Enable CS3 */
> + csa = readl(&matrix->ebicsa);
> + csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
> + writel(csa, &matrix->ebicsa);
> +
> + /* Configure SMC CS3 for NAND/SmartMedia */
> + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
> + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
> + &smc->cs[3].setup);
> + writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
> + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
> + &smc->cs[3].pulse);
> + writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
> + &smc->cs[3].cycle);
> + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
> + AT91_SMC_MODE_EXNW_DISABLE |
> +#ifdef CONFIG_SYS_NAND_DBW_16
> + AT91_SMC_MODE_DBW_16 |
> +#else /* CONFIG_SYS_NAND_DBW_8 */
> + AT91_SMC_MODE_DBW_8 |
> +#endif
> + AT91_SMC_MODE_TDF_CYCLE(3),
> + &smc->cs[3].mode);
> +
> + writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
> +
> + /* Configure RDY/BSY */
> + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
> +
> + /* Enable NandFlash */
> + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
> +}
> +#endif
> +
> +#ifdef CONFIG_CMD_USB
> +static void at91sam9m10g45ek_usb_hw_init(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +
> + writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
> +
> + at91_set_gpio_output(AT91_PIN_PD1, 0);
> + at91_set_gpio_output(AT91_PIN_PD3, 0);
> +}
> +#endif
> +
> +#ifdef CONFIG_MACB
> +static void corvus_macb_hw_init(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
> + unsigned long erstl;
> +
> + /* Enable clock */
> + writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
> +
> + /*
> + * Disable pull-up on:
> + * RXDV (PA15) => PHY normal mode (not Test mode)
> + * ERX0 (PA12) => PHY ADDR0
> + * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
> + *
> + * PHY has internal pull-down
> + */
> + at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
Here applies the same statement as for the taurus board: Could you
please wait for 'ATMEL_LEGACY' PIO API change or provide at91 portmux
API (I think the AVR32 portmux API is a good starting point).
> +
> + erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
> +
> + /* Need to reset PHY -> 500ms reset */
> + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
> + AT91_RSTC_MR_URSTEN, &rstc->mr);
> +
> + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
> +
> + /* Wait for end of reset */
> + at91_wait_for_reset(100);
You say above, that this will be 500ms reset pulse ... but wait just
100ms. Is that Ok?
Please also check the taurus board.
> +
> + /* Restore NRST value */
> + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
> + &rstc->mr);
> +
> + /* Re-enable pull-up */
> + at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
> + at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
> +
> + /* And the pins. */
> + at91_macb_hw_init();
> +}
> +#endif
> +
> +int board_early_init_f(void)
> +{
> + at91_seriald_hw_init();
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> + /* address of boot parameters */
> + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> +
> +#ifdef CONFIG_CMD_NAND
> + corvus_nand_hw_init();
> +#endif
> +#ifdef CONFIG_ATMEL_SPI
> + at91_spi0_hw_init(1 << 4);
> +#endif
> +#ifdef CONFIG_HAS_DATAFLASH
> + at91_spi0_hw_init(1 << 0);
> +#endif
> +#ifdef CONFIG_MACB
> + corvus_macb_hw_init();
> +#endif
> +#ifdef CONFIG_CMD_USB
> + at91sam9m10g45ek_usb_hw_init();
NAK, this is located in another board file (at91sam9m10g45ek), please adopt.
> +#endif
> + return 0;
> +}
> +
> +#ifdef CONFIG_RESET_PHY_R
Why provide empty reset_phy? Just remove the CONFIG_RESET_PHY_R in board
config.
> +void reset_phy(void)
> +{
> +}
> +#endif
> +
> +int dram_init(void)
> +{
> + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
> + CONFIG_SYS_SDRAM_SIZE);
> + return 0;
> +}
> +
> +int board_eth_init(bd_t *bis)
> +{
> + int rc = 0;
> +#ifdef CONFIG_MACB
> + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
> +#endif
> + return rc;
> +}
> +
> +/* SPI chip select control */
> +int spi_cs_is_valid(unsigned int bus, unsigned int cs)
> +{
> + return bus == 0 && cs < 2;
> +}
> +
> +void spi_cs_activate(struct spi_slave *slave)
> +{
> + switch (slave->cs) {
> + case 1:
> + at91_set_gpio_output(AT91_PIN_PB18, 0);
> + break;
> + case 0:
> + default:
> + at91_set_gpio_output(AT91_PIN_PB3, 0);
> + break;
> + }
> +}
> +
> +void spi_cs_deactivate(struct spi_slave *slave)
> +{
> + switch (slave->cs) {
> + case 1:
> + at91_set_gpio_output(AT91_PIN_PB18, 1);
> + break;
> + case 0:
> + default:
> + at91_set_gpio_output(AT91_PIN_PB3, 1);
> + break;
> + }
> +}
> diff --git a/boards.cfg b/boards.cfg
> index 0fe98d0..a207e4a 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -140,6 +140,7 @@ Active arm arm926ejs at91 ronetix pm9g45
> Active arm arm926ejs at91 taskit stamp9g20 portuxg20 stamp9g20:AT91SAM9G20,PORTUXG20 Markus Hubig <mhubig@imko.de>
> Active arm arm926ejs at91 taskit stamp9g20 stamp9g20 stamp9g20:AT91SAM9G20 Markus Hubig <mhubig@imko.de>
> Active arm arm926ejs at91 siemens taurus axm taurus:AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM Heiko Schocher <hs@denx.de>
> +Active arm arm926ejs at91 siemens corvus corvus corvus:AT91SAM9M10G45,SYS_USE_NANDFLASH Heiko Schocher <hs@denx.de>
> Active arm arm926ejs at91 siemens taurus taurus taurus:AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS Heiko Schocher <hs@denx.de>
> Active arm arm926ejs davinci ait cam_enc_4xx cam_enc_4xx cam_enc_4xx Heiko Schocher <hs@denx.de>
> Active arm arm926ejs davinci Barix ipam390 ipam390 - Heiko Schocher <hs@denx.de>
> diff --git a/include/configs/corvus.h b/include/configs/corvus.h
> new file mode 100644
> index 0000000..b864562
> --- /dev/null
> +++ b/include/configs/corvus.h
> @@ -0,0 +1,165 @@
> +/*
> + * Common board functions for siemens AT91SAM9G45 based boards
> + * (C) Copyright 2013 Siemens AG
> + *
> + * Based on:
> + * U-Boot file: include/configs/at91sam9m10g45ek.h
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian@popies.net>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#include <asm/hardware.h>
> +
> +#define MACH_TYPE_CORVUS 2066
> +
> +/*
> + * Warning: changing CONFIG_SYS_TEXT_BASE requires
> + * adapting the initial boot program.
> + * Since the linker has to swallow that define, we must use a pure
> + * hex number here!
> + */
> +
> +#define CONFIG_SYS_TEXT_BASE 0x73f00000
> +
> +#define CONFIG_AT91_LEGACY
> +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
> +
> +/* ARM asynchronous clock */
> +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
> +#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
> +#define CONFIG_SYS_HZ 1000
> +
> +#define CONFIG_AT91FAMILY
> +
> +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_INITRD_TAG
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_DISPLAY_CPUINFO
> +
> +#define CONFIG_CMD_BOOTZ
> +#define CONFIG_OF_LIBFDT
> +
> +/* general purpose I/O */
> +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
> +#define CONFIG_AT91_GPIO
> +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
> +
> +/* serial console */
> +#define CONFIG_ATMEL_USART
> +#define CONFIG_USART_BASE ATMEL_BASE_DBGU
> +#define CONFIG_USART_ID ATMEL_ID_SYS
> +
> +/* LED */
> +#define CONFIG_AT91_LED
> +#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
> +#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
Could you please remove the <tab> between 'define' and defined name.
> +
> +#define CONFIG_BOOTDELAY 3
> +
> +/*
> + * BOOTP options
> + */
> +#define CONFIG_BOOTP_BOOTFILESIZE
> +#define CONFIG_BOOTP_BOOTPATH
> +#define CONFIG_BOOTP_GATEWAY
> +#define CONFIG_BOOTP_HOSTNAME
> +
> +/*
> + * Command line configuration.
> + */
> +#include <config_cmd_default.h>
> +#undef CONFIG_CMD_BDI
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_IMI
> +#undef CONFIG_CMD_IMLS
> +#undef CONFIG_CMD_LOADS
> +
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_NAND
> +#define CONFIG_CMD_USB
> +
> +/* SDRAM */
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
> +#define CONFIG_SYS_SDRAM_SIZE 0x08000000
> +
> +#define CONFIG_SYS_INIT_SP_ADDR \
> + (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
> +
> +/* No NOR flash */
> +#define CONFIG_SYS_NO_FLASH
> +
> +/* NAND flash */
> +#ifdef CONFIG_CMD_NAND
> +#define CONFIG_NAND_ATMEL
> +#define CONFIG_SYS_MAX_NAND_DEVICE 1
> +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
> +#define CONFIG_SYS_NAND_DBW_8
> +/* our ALE is AD21 */
> +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
> +/* our CLE is AD22 */
> +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
> +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
> +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
> +
> +#endif
> +
> +/* Ethernet */
> +#define CONFIG_MACB
> +#define CONFIG_RMII
> +#define CONFIG_NET_RETRY_COUNT 20
> +#define CONFIG_RESET_PHY_R
> +
> +/* USB */
> +#define CONFIG_USB_EHCI
> +#define CONFIG_USB_EHCI_ATMEL
> +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
> +#define CONFIG_DOS_PARTITION
> +#define CONFIG_USB_STORAGE
> +
> +#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */
> +
> +/* bootstrap + u-boot + env in nandflash */
> +#define CONFIG_ENV_IS_IN_NAND
> +#define CONFIG_ENV_OFFSET 0x100000
> +#define CONFIG_ENV_OFFSET_REDUND 0x180000
> +#define CONFIG_ENV_SIZE 0x20000
> +
> +#define CONFIG_BOOTCOMMAND \
> + "nand read 0x70000000 0x200000 0x300000;" \
> + "bootm 0x70000000"
> +#define CONFIG_BOOTARGS \
> + "console=ttyS0,115200 earlyprintk " \
> + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
> + "256k(env),256k(env_redundant),256k(spare)," \
> + "512k(dtb),6M(kernel)ro,-(rootfs) " \
> + "root=/dev/mtdblock7 rw rootfstype=jffs2"
> +
> +#define CONFIG_BAUDRATE 115200
> +
> +#define CONFIG_SYS_PROMPT "U-Boot> "
> +#define CONFIG_SYS_CBSIZE 256
> +#define CONFIG_SYS_MAXARGS 16
> +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
> + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_LONGHELP
> +#define CONFIG_CMDLINE_EDITING
> +#define CONFIG_AUTO_COMPLETE
> +#define CONFIG_SYS_HUSH_PARSER
> +
> +/*
> + * Size of malloc() pool
> + */
> +#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
> + 128*1024, 0x1000)
> +
> +#endif
>
Best regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 4/4] arm, at91: add siemens corvus board
2013-11-04 8:53 ` Andreas Bießmann
@ 2013-11-04 9:53 ` Heiko Schocher
2013-11-04 10:15 ` Andreas Bießmann
2013-11-04 10:51 ` Andreas Bießmann
0 siblings, 2 replies; 19+ messages in thread
From: Heiko Schocher @ 2013-11-04 9:53 UTC (permalink / raw)
To: u-boot
Hello Andreas,
Am 04.11.2013 09:53, schrieb Andreas Bie?mann:
> Hi Heiko,
>
> On 11/04/2013 07:40 AM, Heiko Schocher wrote:
>> enable support for the siemens AT91SAM9G20 based board corvus.
>>
>> Signed-off-by: Boris Schmidt<boris.schmidt@siemens.com>
>> Reviewed-by: Heiko Schocher<hs@denx.de>
>> Cc: Andreas Bie?mann<andreas.devel@googlemail.com>
>> Cc: Bo Shen<voice.shen@atmel.com>
>>
>> ---
>> - changes for v2:
>> - add comments from Bo Shen
>> - use gpio api
>> - remove unneccessary comment
>> - use at91_wait_for_reset()
>> - remove unneccessary code in board file
>> - Coding Style cleanup (tabs and unneccessary 1 after config define
>> removed, use ".xxx = x" notation for initializing structs)
>> - remove reset_phy()
>> - remove CONFIG_SYS_MEMTEST_x defines, as mtest command
>> is not used on this board.
>> - changes load address
>> - delete lcd support
>> - add comments from Andreas Bie?mann:
>> - rearrange some init calls
>> - remove some unneeded ifdef
>> ---
>> board/siemens/corvus/Makefile | 39 ++++++++
>> board/siemens/corvus/board.c | 216 ++++++++++++++++++++++++++++++++++++++++++
>> boards.cfg | 1 +
>> include/configs/corvus.h | 165 ++++++++++++++++++++++++++++++++
>> 4 files changed, 421 insertions(+)
>> create mode 100644 board/siemens/corvus/Makefile
>> create mode 100644 board/siemens/corvus/board.c
>> create mode 100644 include/configs/corvus.h
>>
>> diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
>> new file mode 100644
>> index 0000000..11f0d49
>> --- /dev/null
>> +++ b/board/siemens/corvus/board.c
>> @@ -0,0 +1,216 @@
[...]
>> +#ifdef CONFIG_MACB
>> +static void corvus_macb_hw_init(void)
>> +{
>> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
>> + unsigned long erstl;
>> +
>> + /* Enable clock */
>> + writel(1<< ATMEL_ID_EMAC,&pmc->pcer);
>> +
>> + /*
>> + * Disable pull-up on:
>> + * RXDV (PA15) => PHY normal mode (not Test mode)
>> + * ERX0 (PA12) => PHY ADDR0
>> + * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
>> + *
>> + * PHY has internal pull-down
>> + */
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
>
> Here applies the same statement as for the taurus board: Could you
> please wait for 'ATMEL_LEGACY' PIO API change or provide at91 portmux
> API (I think the AVR32 portmux API is a good starting point).
Yes.
>> +
>> + erstl = readl(&rstc->mr)& AT91_RSTC_MR_ERSTL_MASK;
>> +
>> + /* Need to reset PHY -> 500ms reset */
>> + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
>> + AT91_RSTC_MR_URSTEN,&rstc->mr);
>> +
>> + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST,&rstc->cr);
>> +
>> + /* Wait for end of reset */
>> + at91_wait_for_reset(100);
>
> You say above, that this will be 500ms reset pulse ... but wait just
> 100ms. Is that Ok?
> Please also check the taurus board.
We should rework this as Wolfgang suggested, or?
>> + /* Restore NRST value */
>> + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
>> + &rstc->mr);
>> +
>> + /* Re-enable pull-up */
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
>> + at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
>> +
>> + /* And the pins. */
>> + at91_macb_hw_init();
>> +}
>> +#endif
>> +
>> +int board_early_init_f(void)
>> +{
>> + at91_seriald_hw_init();
>> + return 0;
>> +}
>> +
>> +int board_init(void)
>> +{
>> + /* address of boot parameters */
>> + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>> +
>> +#ifdef CONFIG_CMD_NAND
>> + corvus_nand_hw_init();
>> +#endif
>> +#ifdef CONFIG_ATMEL_SPI
>> + at91_spi0_hw_init(1<< 4);
>> +#endif
>> +#ifdef CONFIG_HAS_DATAFLASH
>> + at91_spi0_hw_init(1<< 0);
>> +#endif
>> +#ifdef CONFIG_MACB
>> + corvus_macb_hw_init();
>> +#endif
>> +#ifdef CONFIG_CMD_USB
>> + at91sam9m10g45ek_usb_hw_init();
>
> NAK, this is located in another board file (at91sam9m10g45ek), please adopt.
reworked.
>> +#endif
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_RESET_PHY_R
>
> Why provide empty reset_phy? Just remove the CONFIG_RESET_PHY_R in board
> config.
removed.
[...]
>> diff --git a/include/configs/corvus.h b/include/configs/corvus.h
>> new file mode 100644
>> index 0000000..b864562
>> --- /dev/null
>> +++ b/include/configs/corvus.h
>> @@ -0,0 +1,165 @@
[...]
>> +/* LED */
>> +#define CONFIG_AT91_LED
>> +#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
>> +#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
>
> Could you please remove the<tab> between 'define' and defined name.
removed.
[...]
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 19+ messages in thread* [U-Boot] [PATCH v2 4/4] arm, at91: add siemens corvus board
2013-11-04 9:53 ` Heiko Schocher
@ 2013-11-04 10:15 ` Andreas Bießmann
2013-11-04 10:32 ` Heiko Schocher
2013-11-04 10:51 ` Andreas Bießmann
1 sibling, 1 reply; 19+ messages in thread
From: Andreas Bießmann @ 2013-11-04 10:15 UTC (permalink / raw)
To: u-boot
Hello Heiko,
On 11/04/2013 10:53 AM, Heiko Schocher wrote:
> Am 04.11.2013 09:53, schrieb Andreas Bie?mann:
>> On 11/04/2013 07:40 AM, Heiko Schocher wrote:
<snip>
>>> + erstl = readl(&rstc->mr)& AT91_RSTC_MR_ERSTL_MASK;
>>> +
>>> + /* Need to reset PHY -> 500ms reset */
>>> + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
>>> + AT91_RSTC_MR_URSTEN,&rstc->mr);
>>> +
>>> + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST,&rstc->cr);
>>> +
>>> + /* Wait for end of reset */
>>> + at91_wait_for_reset(100);
>>
>> You say above, that this will be 500ms reset pulse ... but wait just
>> 100ms. Is that Ok?
>> Please also check the taurus board.
>
> We should rework this as Wolfgang suggested, or?
Could you please give me a pointer? I can't remember what Wolfgang
suggested here.
Best regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH v2 4/4] arm, at91: add siemens corvus board
2013-11-04 10:15 ` Andreas Bießmann
@ 2013-11-04 10:32 ` Heiko Schocher
0 siblings, 0 replies; 19+ messages in thread
From: Heiko Schocher @ 2013-11-04 10:32 UTC (permalink / raw)
To: u-boot
Hello Andreas,
Am 04.11.2013 11:15, schrieb Andreas Bie?mann:
> Hello Heiko,
>
> On 11/04/2013 10:53 AM, Heiko Schocher wrote:
>> Am 04.11.2013 09:53, schrieb Andreas Bie?mann:
>>> On 11/04/2013 07:40 AM, Heiko Schocher wrote:
>
> <snip>
>
>>>> + erstl = readl(&rstc->mr)& AT91_RSTC_MR_ERSTL_MASK;
>>>> +
>>>> + /* Need to reset PHY -> 500ms reset */
>>>> + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
>>>> + AT91_RSTC_MR_URSTEN,&rstc->mr);
>>>> +
>>>> + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST,&rstc->cr);
>>>> +
>>>> + /* Wait for end of reset */
>>>> + at91_wait_for_reset(100);
>>>
>>> You say above, that this will be 500ms reset pulse ... but wait just
>>> 100ms. Is that Ok?
>>> Please also check the taurus board.
>>
>> We should rework this as Wolfgang suggested, or?
>
> Could you please give me a pointer? I can't remember what Wolfgang
> suggested here.
See Wolfgangs comment to my "arm, at91: add function for waiting if
reset ends" patch:
http://lists.denx.de/pipermail/u-boot/2013-November/166061.html
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH v2 4/4] arm, at91: add siemens corvus board
2013-11-04 9:53 ` Heiko Schocher
2013-11-04 10:15 ` Andreas Bießmann
@ 2013-11-04 10:51 ` Andreas Bießmann
1 sibling, 0 replies; 19+ messages in thread
From: Andreas Bießmann @ 2013-11-04 10:51 UTC (permalink / raw)
To: u-boot
Hello Heiko,
On 11/04/2013 10:53 AM, Heiko Schocher wrote:
> Am 04.11.2013 09:53, schrieb Andreas Bie?mann:
>> On 11/04/2013 07:40 AM, Heiko Schocher wrote:
<snip>
>>> +
>>> + erstl = readl(&rstc->mr)& AT91_RSTC_MR_ERSTL_MASK;
>>> +
>>> + /* Need to reset PHY -> 500ms reset */
>>> + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
>>> + AT91_RSTC_MR_URSTEN,&rstc->mr);
>>> +
>>> + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST,&rstc->cr);
>>> +
>>> + /* Wait for end of reset */
>>> + at91_wait_for_reset(100);
>>
>> You say above, that this will be 500ms reset pulse ... but wait just
>> 100ms. Is that Ok?
>> Please also check the taurus board.
>
> We should rework this as Wolfgang suggested, or?
Sounds good. I wonder if exactly that would be the task of
CONFIG_RESET_PHY_R.
<snip>
>>> +#ifdef CONFIG_RESET_PHY_R
>>
>> Why provide empty reset_phy? Just remove the CONFIG_RESET_PHY_R in board
>> config.
>
> removed.
>
Best regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 19+ messages in thread