From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lokesh Vutla Date: Wed, 6 Nov 2013 18:42:20 +0530 Subject: [U-Boot] [PATCH 01/14] ARM: AM43xx: Update the base addresses of modules In-Reply-To: References: <1383625260-22294-1-git-send-email-lokeshvutla@ti.com> <1383625260-22294-2-git-send-email-lokeshvutla@ti.com> Message-ID: <527A4034.3030207@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Vibhav, Thanks for the review...:) On Wednesday 06 November 2013 05:58 PM, Vaibhav Bedia wrote: > HI Lokesh :) > > On Mon, Nov 4, 2013 at 11:20 PM, Lokesh Vutla wrote: >> PRCM, timer base addresses and offsets are different from >> AM33xx. Updating the same. >> >> Signed-off-by: Lokesh Vutla >> --- >> arch/arm/include/asm/arch-am33xx/cpu.h | 17 +++++++++++------ >> arch/arm/include/asm/arch-am33xx/hardware.h | 8 -------- >> arch/arm/include/asm/arch-am33xx/hardware_am33xx.h | 3 +++ >> arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 3 +++ >> arch/arm/include/asm/arch-am33xx/hardware_ti814x.h | 3 +++ >> arch/arm/include/asm/arch-am33xx/hardware_ti816x.h | 3 +++ >> 6 files changed, 23 insertions(+), 14 deletions(-) >> >> diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h >> index 52fa128..f463b27 100644 >> --- a/arch/arm/include/asm/arch-am33xx/cpu.h >> +++ b/arch/arm/include/asm/arch-am33xx/cpu.h >> @@ -237,6 +237,14 @@ struct cm_perpll { >> unsigned int cpswclkstctrl; /* offset 0x144 */ >> unsigned int lcdcclkstctrl; /* offset 0x148 */ >> }; >> + >> +/* Encapsulating Display pll registers */ >> +struct cm_dpll { >> + unsigned int resv1[2]; >> + unsigned int clktimer2clk; /* offset 0x08 */ >> + unsigned int resv2[10]; >> + unsigned int clklcdcpixelclk; /* offset 0x34 */ >> +}; >> #else >> /* Encapsulating core pll registers */ >> struct cm_wkuppll { >> @@ -392,15 +400,12 @@ struct cm_perpll { >> unsigned int resv40[7]; >> unsigned int cpgmac0clkctrl; /* offset 0xB20 */ >> }; >> -#endif /* CONFIG_AM43XX */ >> >> -/* Encapsulating Display pll registers */ >> struct cm_dpll { >> - unsigned int resv1[2]; >> - unsigned int clktimer2clk; /* offset 0x08 */ >> - unsigned int resv2[10]; >> - unsigned int clklcdcpixelclk; /* offset 0x34 */ >> + unsigned int resv1; >> + unsigned int clktimer2clk; /* offset 0x04 */ >> }; >> +#endif /* CONFIG_AM43XX */ >> >> /* Control Module RTC registers */ >> struct cm_rtc { >> diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h b/arch/arm/include/asm/arch-am33xx/hardware.h >> index ee5fce0..b6db731 100644 >> --- a/arch/arm/include/asm/arch-am33xx/hardware.h >> +++ b/arch/arm/include/asm/arch-am33xx/hardware.h >> @@ -38,7 +38,6 @@ >> #define DM_TIMER7_BASE 0x4804A000 >> >> /* GPIO Base address */ >> -#define GPIO0_BASE 0x48032000 > > Going by the patch description this looks an unrelated change. > Moreover, this base address looks wrong! GPIO0 is in wkup > domain for both AM335x and AM437x. I wonder how the > VTT control is working on AM335x. IIRC that was using a pin > from GPIO0. Should have added GPIO also in patch description. > >> #define GPIO1_BASE 0x4804C000 >> >> /* BCH Error Location Module */ >> @@ -48,13 +47,6 @@ >> #define EMIF4_0_CFG_BASE 0x4C000000 >> #define EMIF4_1_CFG_BASE 0x4D000000 >> >> -/* PLL related registers */ >> -#define CM_DPLL 0x44E00500 >> -#define CM_DEVICE 0x44E00700 >> -#define CM_RTC 0x44E00800 >> -#define CM_CEFUSE 0x44E00A00 >> -#define PRM_DEVICE 0x44E00F00 >> - >> /* DDR Base address */ >> #define DDR_CTRL_ADDR 0x44E10E04 >> #define DDR_CONTROL_BASE_ADDR 0x44E11404 >> diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h >> index e4231c8..ad9d7dd 100644 >> --- a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h >> +++ b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h >> @@ -17,6 +17,7 @@ >> #define UART0_BASE 0x44E09000 >> >> /* GPIO Base address */ >> +#define GPIO0_BASE 0x48032000 >> #define GPIO2_BASE 0x481AC000 >> >> /* Watchdog Timer */ >> @@ -30,6 +31,8 @@ >> #define PRCM_BASE 0x44E00000 >> #define CM_PER 0x44E00000 >> #define CM_WKUP 0x44E00400 >> +#define CM_DPLL 0x44E00500 >> +#define CM_RTC 0x44E00800 >> >> #define PRM_RSTCTRL (PRCM_BASE + 0x0F00) >> #define PRM_RSTST (PRM_RSTCTRL + 8) >> diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h >> index 3b665e6..4dbc789 100644 >> --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h >> +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h >> @@ -17,6 +17,7 @@ >> #define UART0_BASE 0x44E09000 >> >> /* GPIO Base address */ >> +#define GPIO0_BASE 0x44E07000 > > Looks like this address is same for AM335x (what the code has > right now is incorrect) and AM437x. So you can move it back to > hardware.h if that's the general convention. > >> #define GPIO2_BASE 0x481AC000 >> >> /* Watchdog Timer */ >> @@ -30,6 +31,8 @@ >> #define PRCM_BASE 0x44DF0000 >> #define CM_WKUP 0x44DF2800 >> #define CM_PER 0x44DF8800 >> +#define CM_DPLL 0x44DF4200 >> +#define CM_RTC 0x44df8500 >> >> #define PRM_RSTCTRL (PRCM_BASE + 0x4000) >> #define PRM_RSTST (PRM_RSTCTRL + 4) >> diff --git a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h >> index 4509a23..2322bc4 100644 >> --- a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h >> +++ b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h >> @@ -16,6 +16,7 @@ >> /* UART Base Address */ >> #define UART0_BASE 0x48020000 >> >> +#define GPIO0_BASE 0x48032000 > > So that's where the current address came from. Still incorrect > for AMxx. Yes you are correct. Just now I verified that there is asm/arch-am33xx/gpio.h file in which AM33XX_GPIO0_BASE is defined. This is used by AM33xx. I am not sure why GPIO_BASE is added again in hardware.h file. Any way I can reuse the GPIO base address from the above file instead of adding in hardware.h file. Thanks for the pointer. Thanks and regards, Lokesh > > Regards, > Vaibhav >