[U-Boot] [PATCH 0/4] mx6: Add SPL Framewok

[Eric Nelson <eric.nelson@boundarydevices.com>]

Hi Edward,

On 11/08/2013 02:33 AM, Edward Lin wrote:
> Add common code for SPL boot on imx6.
>
> Patch 1 adds a function to determine which device mx6 is booting from.
>
> Patch 2 adds structures for mmdc and ddr iomux registers
>
> Patch 3 adds co-existing pad configs that allows the support of
> mx6q/mx6d/mx6dl/mx6s in one binary.
>
> Patch 4 adds mx6 arch-specific spl header.
>
>   arch/arm/cpu/armv7/mx6/soc.c                 |   43 +
>   arch/arm/include/asm/arch-mx6/mx6_ddr_regs.h |  167 ++
>   arch/arm/include/asm/arch-mx6/mx6qdl_pins.h  | 3290
> ++++++++++++++++++++++++++
>   arch/arm/include/asm/arch-mx6/spl.h          |   25 +
>   arch/arm/include/asm/arch-mx6/sys_proto.h    |   17 +
>   5 files changed, 3542 insertions(+)
>   create mode 100644 arch/arm/include/asm/arch-mx6/mx6_ddr_regs.h
>   create mode 100644 arch/arm/include/asm/arch-mx6/mx6qdl_pins.h
>   create mode 100644 arch/arm/include/asm/arch-mx6/spl.h
>

This patch set is mostly about support for multiple i.MX6
architectures, not SPL, right?

It seems to me that there are three distinct things that
we're all after, and we should probably separate them for
the purpose of patch review:

	-- Add support for SPL

	-- Add support for binaries which can run on both
	i.MX6DQ and i.MX6DLS parts

	-- Add support for dynamic memory setup

Since the second two are closely correlated and requires
that some code be executed in internal RAM, does it make
sense to start there?

We can't re-configure DDR while executing from DDR, and
the two architectures have different DDR limits, which
makes SPL the first pre-requisite (and likely the easiest).

Regards,


Eric