* [U-Boot] [PATCH] i.MX6: nitrogen6x: update memory configuration files to use macros
@ 2013-11-14 18:30 Eric Nelson
2013-11-14 21:20 ` Marek Vasut
0 siblings, 1 reply; 6+ messages in thread
From: Eric Nelson @ 2013-11-14 18:30 UTC (permalink / raw)
To: u-boot
This patch updates the memory configuration files for the Nitrogen6X
boards to use macros to define the output for imximage. This allows
re-use of the same files of register/value pairs to be included from C
as a pre-cursor to run-time detection of the memory size on a board.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
---
board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg | 72 ++++++++++++-------------
board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg | 72 ++++++++++++-------------
board/boundary/nitrogen6x/800mhz_2x128mx16.cfg | 72 ++++++++++++-------------
board/boundary/nitrogen6x/800mhz_2x256mx16.cfg | 72 ++++++++++++-------------
board/boundary/nitrogen6x/800mhz_4x128mx16.cfg | 72 ++++++++++++-------------
board/boundary/nitrogen6x/800mhz_4x256mx16.cfg | 72 ++++++++++++-------------
board/boundary/nitrogen6x/nitrogen6dl.cfg | 1 +
board/boundary/nitrogen6x/nitrogen6dl2g.cfg | 1 +
board/boundary/nitrogen6x/nitrogen6q.cfg | 1 +
board/boundary/nitrogen6x/nitrogen6q2g.cfg | 1 +
board/boundary/nitrogen6x/nitrogen6s.cfg | 1 +
board/boundary/nitrogen6x/nitrogen6s1g.cfg | 1 +
12 files changed, 222 insertions(+), 216 deletions(-)
diff --git a/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg b/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg
index 6c68146..c3d15a2 100644
--- a/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg
+++ b/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg
@@ -4,39 +4,39 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x555A7974
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x005A1023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
-DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42720306
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x026F0266
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4273030A
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02740240
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45393B3E
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x403A3747
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x40434541
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x473E4A3B
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0011000E
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x000E001B
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00190015
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00070018
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x00020036)
+DCD_REG(MX6_MMDC_P0_MDCFG0, 0x555A7974)
+DCD_REG(MX6_MMDC_P0_MDCFG1, 0xDB538F64)
+DCD_REG(MX6_MMDC_P0_MDCFG2, 0x01FF00DB)
+DCD_REG(MX6_MMDC_P0_MDRWD, 0x000026D2)
+DCD_REG(MX6_MMDC_P0_MDOR, 0x005A1023)
+DCD_REG(MX6_MMDC_P0_MDOTC, 0x09444040)
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x00025576)
+DCD_REG(MX6_MMDC_P0_MDASP, 0x00000027)
+DCD_REG(MX6_MMDC_P0_MDCTL, 0x831A0000)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04088032)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00008033)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00428031)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x19308030)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04008040)
+DCD_REG(MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P0_MDREF, 0x00005800)
+DCD_REG(MX6_MMDC_P0_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P1_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL0, 0x42720306)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL1, 0x026F0266)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL0, 0x4273030A)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL1, 0x02740240)
+DCD_REG(MX6_MMDC_P0_MPRDDLCTL, 0x45393B3E)
+DCD_REG(MX6_MMDC_P1_MPRDDLCTL, 0x403A3747)
+DCD_REG(MX6_MMDC_P0_MPWRDLCTL, 0x40434541)
+DCD_REG(MX6_MMDC_P1_MPWRDLCTL, 0x473E4A3B)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL0, 0x0011000E)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL1, 0x000E001B)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL0, 0x00190015)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL1, 0x00070018)
+DCD_REG(MX6_MMDC_P0_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P1_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00000000)
+DCD_REG(MX6_MMDC_P0_MAPSR, 0x00011006)
diff --git a/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg b/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg
index bb5716e..af7ca1f 100644
--- a/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg
+++ b/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg
@@ -4,39 +4,39 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E7974
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000047
-DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43040319
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03040279
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43040321
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03030251
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4d434248
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x42413c4d
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x34424543
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x49324933
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001a0017
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00170027
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x000a001f
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x00020036)
+DCD_REG(MX6_MMDC_P0_MDCFG0, 0x898E7974)
+DCD_REG(MX6_MMDC_P0_MDCFG1, 0xDB538F64)
+DCD_REG(MX6_MMDC_P0_MDCFG2, 0x01FF00DB)
+DCD_REG(MX6_MMDC_P0_MDRWD, 0x000026D2)
+DCD_REG(MX6_MMDC_P0_MDOR, 0x008E1023)
+DCD_REG(MX6_MMDC_P0_MDOTC, 0x09444040)
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x00025576)
+DCD_REG(MX6_MMDC_P0_MDASP, 0x00000047)
+DCD_REG(MX6_MMDC_P0_MDCTL, 0x841A0000)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04088032)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00008033)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00428031)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x19308030)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04008040)
+DCD_REG(MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P0_MDREF, 0x00007800)
+DCD_REG(MX6_MMDC_P0_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P1_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL0, 0x43040319)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL1, 0x03040279)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL0, 0x43040321)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL1, 0x03030251)
+DCD_REG(MX6_MMDC_P0_MPRDDLCTL, 0x4d434248)
+DCD_REG(MX6_MMDC_P1_MPRDDLCTL, 0x42413c4d)
+DCD_REG(MX6_MMDC_P0_MPWRDLCTL, 0x34424543)
+DCD_REG(MX6_MMDC_P1_MPWRDLCTL, 0x49324933)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL0, 0x001a0017)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL0, 0x00170027)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL1, 0x000a001f)
+DCD_REG(MX6_MMDC_P0_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P1_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00000000)
+DCD_REG(MX6_MMDC_P0_MAPSR, 0x00011006)
diff --git a/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg b/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg
index e005a64..e115f85 100644
--- a/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg
+++ b/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg
@@ -4,39 +4,39 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x40435323
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x00431023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000017
-DATA 4, MX6_MMDC_P0_MDCTL, 0x83190000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x0002002D)
+DCD_REG(MX6_MMDC_P0_MDCFG0, 0x40435323)
+DCD_REG(MX6_MMDC_P0_MDCFG1, 0xB66E8D63)
+DCD_REG(MX6_MMDC_P0_MDCFG2, 0x01FF00DB)
+DCD_REG(MX6_MMDC_P0_MDRWD, 0x000026D2)
+DCD_REG(MX6_MMDC_P0_MDOR, 0x00431023)
+DCD_REG(MX6_MMDC_P0_MDOTC, 0x00333030)
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x0002556D)
+DCD_REG(MX6_MMDC_P0_MDASP, 0x00000017)
+DCD_REG(MX6_MMDC_P0_MDCTL, 0x83190000)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04008032)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00008033)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00048031)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x13208030)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04008040)
+DCD_REG(MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P0_MDREF, 0x00005800)
+DCD_REG(MX6_MMDC_P0_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P1_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL0, 0x42350231)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL0, 0x42350231)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL1, 0x021A0218)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL1, 0x021A0218)
+DCD_REG(MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49)
+DCD_REG(MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49)
+DCD_REG(MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035)
+DCD_REG(MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E)
+DCD_REG(MX6_MMDC_P0_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P1_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00000000)
+DCD_REG(MX6_MMDC_P0_MAPSR, 0x00011006)
diff --git a/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg b/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg
index 581d44c..3e4bdb3 100644
--- a/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg
+++ b/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg
@@ -4,39 +4,39 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x696C5323
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x006C1023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
-DATA 4, MX6_MMDC_P0_MDCTL, 0x84190000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x0002002D)
+DCD_REG(MX6_MMDC_P0_MDCFG0, 0x696C5323)
+DCD_REG(MX6_MMDC_P0_MDCFG1, 0xB66E8D63)
+DCD_REG(MX6_MMDC_P0_MDCFG2, 0x01FF00DB)
+DCD_REG(MX6_MMDC_P0_MDRWD, 0x000026D2)
+DCD_REG(MX6_MMDC_P0_MDOR, 0x006C1023)
+DCD_REG(MX6_MMDC_P0_MDOTC, 0x00333030)
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x0002556D)
+DCD_REG(MX6_MMDC_P0_MDASP, 0x00000027)
+DCD_REG(MX6_MMDC_P0_MDCTL, 0x84190000)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04008032)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00008033)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00048031)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x13208030)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04008040)
+DCD_REG(MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P0_MDREF, 0x00007800)
+DCD_REG(MX6_MMDC_P0_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P1_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL0, 0x42350231)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL1, 0x021A0218)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL0, 0x42350231)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL1, 0x021A0218)
+DCD_REG(MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49)
+DCD_REG(MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49)
+DCD_REG(MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035)
+DCD_REG(MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E)
+DCD_REG(MX6_MMDC_P0_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P1_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00000000)
+DCD_REG(MX6_MMDC_P0_MAPSR, 0x00011006)
diff --git a/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg b/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg
index 1069342..e7100fc 100644
--- a/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg
+++ b/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg
@@ -4,39 +4,39 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x40435323
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x00431023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
-DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x420F020F
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x01760175
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x41640171
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x015E0160
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45464B4A
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x49484A46
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x40402E32
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3A3A3231
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x003A003A
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0030002F
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x002F0038
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00270039
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x0002002D)
+DCD_REG(MX6_MMDC_P0_MDCFG0, 0x40435323)
+DCD_REG(MX6_MMDC_P0_MDCFG1, 0xB66E8D63)
+DCD_REG(MX6_MMDC_P0_MDCFG2, 0x01FF00DB)
+DCD_REG(MX6_MMDC_P0_MDRWD, 0x000026D2)
+DCD_REG(MX6_MMDC_P0_MDOR, 0x00431023)
+DCD_REG(MX6_MMDC_P0_MDOTC, 0x00333030)
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x0002556D)
+DCD_REG(MX6_MMDC_P0_MDASP, 0x00000027)
+DCD_REG(MX6_MMDC_P0_MDCTL, 0x831A0000)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04008032)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00008033)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00048031)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x13208030)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04008040)
+DCD_REG(MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P0_MDREF, 0x00005800)
+DCD_REG(MX6_MMDC_P0_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P1_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL0, 0x420F020F)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL1, 0x01760175)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL0, 0x41640171)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL1, 0x015E0160)
+DCD_REG(MX6_MMDC_P0_MPRDDLCTL, 0x45464B4A)
+DCD_REG(MX6_MMDC_P1_MPRDDLCTL, 0x49484A46)
+DCD_REG(MX6_MMDC_P0_MPWRDLCTL, 0x40402E32)
+DCD_REG(MX6_MMDC_P1_MPWRDLCTL, 0x3A3A3231)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL0, 0x003A003A)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL1, 0x0030002F)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL0, 0x002F0038)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL1, 0x00270039)
+DCD_REG(MX6_MMDC_P0_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P1_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00000000)
+DCD_REG(MX6_MMDC_P0_MAPSR, 0x00011006)
diff --git a/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg b/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg
index 7c7a3d1..929ae53 100644
--- a/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg
+++ b/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg
@@ -4,39 +4,39 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x696C5323
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x006C1023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000047
-DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x0002002D)
+DCD_REG(MX6_MMDC_P0_MDCFG0, 0x696C5323)
+DCD_REG(MX6_MMDC_P0_MDCFG1, 0xB66E8D63)
+DCD_REG(MX6_MMDC_P0_MDCFG2, 0x01FF00DB)
+DCD_REG(MX6_MMDC_P0_MDRWD, 0x000026D2)
+DCD_REG(MX6_MMDC_P0_MDOR, 0x006C1023)
+DCD_REG(MX6_MMDC_P0_MDOTC, 0x00333030)
+DCD_REG(MX6_MMDC_P0_MDPDC, 0x0002556D)
+DCD_REG(MX6_MMDC_P0_MDASP, 0x00000047)
+DCD_REG(MX6_MMDC_P0_MDCTL, 0x841A0000)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04008032)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00008033)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00048031)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x13208030)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x04008040)
+DCD_REG(MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003)
+DCD_REG(MX6_MMDC_P0_MDREF, 0x00007800)
+DCD_REG(MX6_MMDC_P0_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P1_MPODTCTRL, 0x00022227)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL0, 0x42350231)
+DCD_REG(MX6_MMDC_P0_MPDGCTRL1, 0x021A0218)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL0, 0x42350231)
+DCD_REG(MX6_MMDC_P1_MPDGCTRL1, 0x021A0218)
+DCD_REG(MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49)
+DCD_REG(MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49)
+DCD_REG(MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035)
+DCD_REG(MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C)
+DCD_REG(MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C)
+DCD_REG(MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E)
+DCD_REG(MX6_MMDC_P0_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P1_MPMUR0, 0x00000800)
+DCD_REG(MX6_MMDC_P0_MDSCR, 0x00000000)
+DCD_REG(MX6_MMDC_P0_MAPSR, 0x00011006)
diff --git a/board/boundary/nitrogen6x/nitrogen6dl.cfg b/board/boundary/nitrogen6x/nitrogen6dl.cfg
index 97ae0c2..b7b1609 100644
--- a/board/boundary/nitrogen6x/nitrogen6dl.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6dl.cfg
@@ -25,5 +25,6 @@ BOOT_FROM sd
#include "asm/arch/crm_regs.h"
#include "ddr-setup.cfg"
+#define DCD_REG(name,val) DATA 4 name val
#include "800mhz_4x128mx16.cfg"
#include "clocks.cfg"
diff --git a/board/boundary/nitrogen6x/nitrogen6dl2g.cfg b/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
index 82f837e..85ab85c 100644
--- a/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
@@ -25,5 +25,6 @@ BOOT_FROM sd
#include "asm/arch/crm_regs.h"
#include "ddr-setup.cfg"
+#define DCD_REG(name,val) DATA 4 name val
#include "800mhz_4x256mx16.cfg"
#include "clocks.cfg"
diff --git a/board/boundary/nitrogen6x/nitrogen6q.cfg b/board/boundary/nitrogen6x/nitrogen6q.cfg
index b6f1518..cf77be3 100644
--- a/board/boundary/nitrogen6x/nitrogen6q.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6q.cfg
@@ -25,5 +25,6 @@ BOOT_FROM sd
#include "asm/arch/crm_regs.h"
#include "ddr-setup.cfg"
+#define DCD_REG(name,val) DATA 4 name val
#include "1066mhz_4x128mx16.cfg"
#include "clocks.cfg"
diff --git a/board/boundary/nitrogen6x/nitrogen6q2g.cfg b/board/boundary/nitrogen6x/nitrogen6q2g.cfg
index 8d7ff25..623fb3c 100644
--- a/board/boundary/nitrogen6x/nitrogen6q2g.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6q2g.cfg
@@ -25,5 +25,6 @@ BOOT_FROM sd
#include "asm/arch/crm_regs.h"
#include "ddr-setup.cfg"
+#define DCD_REG(name,val) DATA 4 name val
#include "1066mhz_4x256mx16.cfg"
#include "clocks.cfg"
diff --git a/board/boundary/nitrogen6x/nitrogen6s.cfg b/board/boundary/nitrogen6x/nitrogen6s.cfg
index 34fb9d0..34f0c18 100644
--- a/board/boundary/nitrogen6x/nitrogen6s.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6s.cfg
@@ -25,5 +25,6 @@ BOOT_FROM sd
#include "asm/arch/crm_regs.h"
#include "ddr-setup.cfg"
+#define DCD_REG(name,val) DATA 4 name val
#include "800mhz_2x128mx16.cfg"
#include "clocks.cfg"
diff --git a/board/boundary/nitrogen6x/nitrogen6s1g.cfg b/board/boundary/nitrogen6x/nitrogen6s1g.cfg
index d61453c..dedc078 100644
--- a/board/boundary/nitrogen6x/nitrogen6s1g.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6s1g.cfg
@@ -25,5 +25,6 @@ BOOT_FROM sd
#include "asm/arch/crm_regs.h"
#include "ddr-setup.cfg"
+#define DCD_REG(name,val) DATA 4 name val
#include "800mhz_2x256mx16.cfg"
#include "clocks.cfg"
--
1.8.1.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] i.MX6: nitrogen6x: update memory configuration files to use macros
2013-11-14 18:30 [U-Boot] [PATCH] i.MX6: nitrogen6x: update memory configuration files to use macros Eric Nelson
@ 2013-11-14 21:20 ` Marek Vasut
2013-11-14 21:28 ` Eric Nelson
0 siblings, 1 reply; 6+ messages in thread
From: Marek Vasut @ 2013-11-14 21:20 UTC (permalink / raw)
To: u-boot
Dear Eric Nelson,
> This patch updates the memory configuration files for the Nitrogen6X
> boards to use macros to define the output for imximage. This allows
> re-use of the same files of register/value pairs to be included from C
> as a pre-cursor to run-time detection of the memory size on a board.
>
> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
> ---
> board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg | 72
> ++++++++++++------------- board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg
> | 72 ++++++++++++-------------
> board/boundary/nitrogen6x/800mhz_2x128mx16.cfg | 72
> ++++++++++++------------- board/boundary/nitrogen6x/800mhz_2x256mx16.cfg
> | 72 ++++++++++++-------------
> board/boundary/nitrogen6x/800mhz_4x128mx16.cfg | 72
> ++++++++++++------------- board/boundary/nitrogen6x/800mhz_4x256mx16.cfg
> | 72 ++++++++++++------------- board/boundary/nitrogen6x/nitrogen6dl.cfg
> | 1 +
> board/boundary/nitrogen6x/nitrogen6dl2g.cfg | 1 +
> board/boundary/nitrogen6x/nitrogen6q.cfg | 1 +
> board/boundary/nitrogen6x/nitrogen6q2g.cfg | 1 +
> board/boundary/nitrogen6x/nitrogen6s.cfg | 1 +
> board/boundary/nitrogen6x/nitrogen6s1g.cfg | 1 +
> 12 files changed, 222 insertions(+), 216 deletions(-)
I dont mind either way, but just an idea for discussion:
What do you say to implementing the DRAM controller programming in SPL? That
way, we can even do proper DRAM calibration on boot and other such nice things.
And we'd also get rid of these static magic numbers all around.
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] i.MX6: nitrogen6x: update memory configuration files to use macros
2013-11-14 21:20 ` Marek Vasut
@ 2013-11-14 21:28 ` Eric Nelson
2013-11-14 23:32 ` Marek Vasut
2013-11-18 9:32 ` Stefano Babic
0 siblings, 2 replies; 6+ messages in thread
From: Eric Nelson @ 2013-11-14 21:28 UTC (permalink / raw)
To: u-boot
Hi Marek,
On 11/14/2013 02:20 PM, Marek Vasut wrote:
> Dear Eric Nelson,
>
>> This patch updates the memory configuration files for the Nitrogen6X
>> boards to use macros to define the output for imximage. This allows
>> re-use of the same files of register/value pairs to be included from C
>> as a pre-cursor to run-time detection of the memory size on a board.
>>
>> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
>> ---
>> board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg | 72
>> ++++++++++++------------- board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg
>> | 72 ++++++++++++-------------
>> board/boundary/nitrogen6x/800mhz_2x128mx16.cfg | 72
>> ++++++++++++------------- board/boundary/nitrogen6x/800mhz_2x256mx16.cfg
>> | 72 ++++++++++++-------------
>> board/boundary/nitrogen6x/800mhz_4x128mx16.cfg | 72
>> ++++++++++++------------- board/boundary/nitrogen6x/800mhz_4x256mx16.cfg
>> | 72 ++++++++++++------------- board/boundary/nitrogen6x/nitrogen6dl.cfg
>> | 1 +
>> board/boundary/nitrogen6x/nitrogen6dl2g.cfg | 1 +
>> board/boundary/nitrogen6x/nitrogen6q.cfg | 1 +
>> board/boundary/nitrogen6x/nitrogen6q2g.cfg | 1 +
>> board/boundary/nitrogen6x/nitrogen6s.cfg | 1 +
>> board/boundary/nitrogen6x/nitrogen6s1g.cfg | 1 +
>> 12 files changed, 222 insertions(+), 216 deletions(-)
>
> I dont mind either way, but just an idea for discussion:
>
> What do you say to implementing the DRAM controller programming in SPL? That
> way, we can even do proper DRAM calibration on boot and other such nice things.
> And we'd also get rid of these static magic numbers all around.
>
We can (and hopefully will very soon) implement some of the
configuration in C under SPL, but we can't (and shouldn't) get
rid of all of the magic numbers.
Some of these numbers come from testing large numbers of devices
under a variety of temperature conditions. The best that the
automagic calibration facilities can do is set things up based
on nominal current conditions.
That said, I'm sure we can cut down on the total number.
My immediate goal is simply to set the stage for SPL and
a single binary.
Regards,
Eric
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] i.MX6: nitrogen6x: update memory configuration files to use macros
2013-11-14 21:28 ` Eric Nelson
@ 2013-11-14 23:32 ` Marek Vasut
2013-11-18 9:32 ` Stefano Babic
1 sibling, 0 replies; 6+ messages in thread
From: Marek Vasut @ 2013-11-14 23:32 UTC (permalink / raw)
To: u-boot
Dear Eric Nelson,
> Hi Marek,
>
> On 11/14/2013 02:20 PM, Marek Vasut wrote:
> > Dear Eric Nelson,
> >
> >> This patch updates the memory configuration files for the Nitrogen6X
> >> boards to use macros to define the output for imximage. This allows
> >> re-use of the same files of register/value pairs to be included from C
> >> as a pre-cursor to run-time detection of the memory size on a board.
> >>
> >> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
> >> ---
> >>
> >> board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg | 72
> >>
> >> ++++++++++++-------------
> >> board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg
> >>
> >> | 72 ++++++++++++-------------
> >>
> >> board/boundary/nitrogen6x/800mhz_2x128mx16.cfg | 72
> >> ++++++++++++------------- board/boundary/nitrogen6x/800mhz_2x256mx16.cfg
> >>
> >> | 72 ++++++++++++-------------
> >>
> >> board/boundary/nitrogen6x/800mhz_4x128mx16.cfg | 72
> >> ++++++++++++------------- board/boundary/nitrogen6x/800mhz_4x256mx16.cfg
> >>
> >> | 72 ++++++++++++------------- board/boundary/nitrogen6x/nitrogen6dl.cfg
> >> |
> >> | 1 +
> >>
> >> board/boundary/nitrogen6x/nitrogen6dl2g.cfg | 1 +
> >> board/boundary/nitrogen6x/nitrogen6q.cfg | 1 +
> >> board/boundary/nitrogen6x/nitrogen6q2g.cfg | 1 +
> >> board/boundary/nitrogen6x/nitrogen6s.cfg | 1 +
> >> board/boundary/nitrogen6x/nitrogen6s1g.cfg | 1 +
> >> 12 files changed, 222 insertions(+), 216 deletions(-)
> >
> > I dont mind either way, but just an idea for discussion:
> >
> > What do you say to implementing the DRAM controller programming in SPL?
> > That way, we can even do proper DRAM calibration on boot and other such
> > nice things. And we'd also get rid of these static magic numbers all
> > around.
>
> We can (and hopefully will very soon) implement some of the
> configuration in C under SPL, but we can't (and shouldn't) get
> rid of all of the magic numbers.
That would be really nice.
> Some of these numbers come from testing large numbers of devices
> under a variety of temperature conditions. The best that the
> automagic calibration facilities can do is set things up based
> on nominal current conditions.
This is what I'm concerned about. On the other hand, the DRAM controller in
iMXes does run-time recalibration of the DDR, does it not ?
> That said, I'm sure we can cut down on the total number.
Absolutely. And if we cannot do runtime calibration, we could at least have
support for multiple boards in a single image.
> My immediate goal is simply to set the stage for SPL and
> a single binary.
Full ACK on this course ;-)
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] i.MX6: nitrogen6x: update memory configuration files to use macros
2013-11-14 21:28 ` Eric Nelson
2013-11-14 23:32 ` Marek Vasut
@ 2013-11-18 9:32 ` Stefano Babic
2013-11-18 14:21 ` Eric Nelson
1 sibling, 1 reply; 6+ messages in thread
From: Stefano Babic @ 2013-11-18 9:32 UTC (permalink / raw)
To: u-boot
Hi Eric,
On 14/11/2013 22:28, Eric Nelson wrote:
>> I dont mind either way, but just an idea for discussion:
>>
>> What do you say to implementing the DRAM controller programming in
>> SPL? That
>> way, we can even do proper DRAM calibration on boot and other such
>> nice things.
>> And we'd also get rid of these static magic numbers all around.
>>
>
> We can (and hopefully will very soon) implement some of the
> configuration in C under SPL, but we can't (and shouldn't) get
> rid of all of the magic numbers.
>
> Some of these numbers come from testing large numbers of devices
> under a variety of temperature conditions. The best that the
> automagic calibration facilities can do is set things up based
> on nominal current conditions.
>
> That said, I'm sure we can cut down on the total number.
>
> My immediate goal is simply to set the stage for SPL and
> a single binary.
I agree on this roadmap. Of course, it will be very nice to allow
runtime DDR calibration, but we can do this in a second step.
Best regards,
Stefano
--
=====================================================================
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] i.MX6: nitrogen6x: update memory configuration files to use macros
2013-11-18 9:32 ` Stefano Babic
@ 2013-11-18 14:21 ` Eric Nelson
0 siblings, 0 replies; 6+ messages in thread
From: Eric Nelson @ 2013-11-18 14:21 UTC (permalink / raw)
To: u-boot
On 11/18/2013 02:32 AM, Stefano Babic wrote:
> Hi Eric,
>
> On 14/11/2013 22:28, Eric Nelson wrote:
>>> I dont mind either way, but just an idea for discussion:
>>>
>>> What do you say to implementing the DRAM controller programming in
>>> SPL? That
>>> way, we can even do proper DRAM calibration on boot and other such
>>> nice things.
>>> And we'd also get rid of these static magic numbers all around.
>>>
>>
>> We can (and hopefully will very soon) implement some of the
>> configuration in C under SPL, but we can't (and shouldn't) get
>> rid of all of the magic numbers.
>>
>> Some of these numbers come from testing large numbers of devices
>> under a variety of temperature conditions. The best that the
>> automagic calibration facilities can do is set things up based
>> on nominal current conditions.
>>
>> That said, I'm sure we can cut down on the total number.
>>
>> My immediate goal is simply to set the stage for SPL and
>> a single binary.
>
> I agree on this roadmap. Of course, it will be very nice to allow
> runtime DDR calibration, but we can do this in a second step.
>
Thanks Stefano,
BTW, I did some additional work yesterday to complete the compilation
of a single SPL image with multiple DDR configurations.
A V2 of this patch will be needed.
Regards,
Eric
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2013-11-18 14:21 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2013-11-14 18:30 [U-Boot] [PATCH] i.MX6: nitrogen6x: update memory configuration files to use macros Eric Nelson
2013-11-14 21:20 ` Marek Vasut
2013-11-14 21:28 ` Eric Nelson
2013-11-14 23:32 ` Marek Vasut
2013-11-18 9:32 ` Stefano Babic
2013-11-18 14:21 ` Eric Nelson
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