From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Mon, 25 Nov 2013 16:12:10 -0700 Subject: [U-Boot] [PATCH] arm: tegra: Fix the CPU complex reset masks In-Reply-To: <20131125115424.47113ae3@avionic-0020> References: <1384965766-28291-1-git-send-email-alban.bedel@avionic-design.de> <528E6C5F.1020506@wwwdotorg.org> <20131125115424.47113ae3@avionic-0020> Message-ID: <5293D94A.6020206@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 11/25/2013 03:54 AM, Alban Bedel wrote: > On Thu, 21 Nov 2013 13:26:07 -0700 > Stephen Warren wrote: > >> On 11/20/2013 09:42 AM, Alban Bedel wrote: >>> The CPU complex reset masks are not matching with the datasheet for >>> the CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 registers. For both T20 >>> and T30 the register consist of groups of 4 bits, with one bit for >>> each CPU core. On T20 the 2 high bits of each group are always stubbed >>> as there is only 2 cores. >> >> This looks correct to me. Given this problem, it's surprising that >> reset_A9_cpu() was operating correctly, and that secondary CPUs were >> coming out of reset OK later. What testing has this had (which SoCs and >> boards)? > > I only tested it on T30 using our Tamonten NG board. OK, I tested on all Tegra SoCs, and everything (including a CPU hotplug test in a kernel once booted with the new U-Boot) still works, so, Tested-by: Stephen Warren