From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Nelson Date: Wed, 27 Nov 2013 09:19:25 -0700 Subject: [U-Boot] [PATCH 5/5] ARM: mx6: Enable PCIe on Sabrelite In-Reply-To: <1384186966-6054-5-git-send-email-marex@denx.de> References: <1384186966-6054-1-git-send-email-marex@denx.de> <1384186966-6054-5-git-send-email-marex@denx.de> Message-ID: <52961B8D.5070205@boundarydevices.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Thanks Marek, On 11/11/2013 09:22 AM, Marek Vasut wrote: > Enable PCI express on MX6 Sabrelite. > > Signed-off-by: Marek Vasut > Cc: Albert Aribaud > Cc: Eric Nelson > Cc: Fabio Estevam > Cc: Stefano Babic > --- > board/boundary/nitrogen6x/nitrogen6x.c | 7 ++++++- > include/configs/nitrogen6x.h | 11 +++++++++++ > 2 files changed, 17 insertions(+), 1 deletion(-) > > diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c > index 1712908..46be51e 100644 > --- a/board/boundary/nitrogen6x/nitrogen6x.c > +++ b/board/boundary/nitrogen6x/nitrogen6x.c > @@ -369,7 +369,12 @@ int board_eth_init(bd_t *bis) > free(bus); > } > #endif > - return 0; > + I think this bit needs a different configuration option and should be disabled by default. > +#ifdef CONFIG_PCI > + ret = pci_eth_init(bis); > +#endif > + It seems to lock up the system if you don't have the proper device connected. Without this bit, I was able to confirm proper enumeration of a PCIe bus with a USB 3.0 controller: 00:01.0 - 16c3:abcd - Bridge device 01:00.0 - 1b21:0612 - Mass storage controller Unfortunately, in a quick test, the image fails to boot without a PCIe device connected, or oddly, with a different PCIe ethernet controller connected. I think it's handy to have the placeholder here, but I think you're the only person on the planet with the right set of components to make it work at the moment. Regards, Eric