From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Wed, 11 Dec 2013 10:11:57 -0800
Subject: [U-Boot] [PATCH][v2] powerpc/mpc85xx: Add support for single
	source clocking
In-Reply-To: <1386738818-6744-1-git-send-email-Priyanka.Jain@freescale.com>
References: <1386738818-6744-1-git-send-email-Priyanka.Jain@freescale.com>
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On 12/10/2013 09:13 PM, Priyanka Jain wrote:
> Single-source clocking is new feature introduced in T1040.
> In this mode, a differential clock is supplied to the
> DIFF_SYSCLK_P/N inputs to the processor, which in turn is
> used to supply clocks to the sysclock, ddrclock and usbclock.
> 
> So, both ddrclock and syclock are driven by same differential
> sysclock in single-sourec clocking whereas in normal clocking
> mode, generally separate DDRCLK and SYSCLK pins provides
> reference clock for sysclock and ddrclock
> 
> DDR_REFCLK_SEL rcw bit is used to determine DDR clock source
> -If DDR_REFCLK_SEL rcw bit is 0, then DDR PLLs are driven in
>  normal clocking mode by DDR_Reference clock
> 
> -If DDR_REFCLK_SEL rcw bit is 1, then DDR PLLs are driven in
>  single source clocking mode by DIFF_SYSCLK
> 
> Add code to determine ddrclock based on DDR_REFCLK_SEL rcw bit.
> 
> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
> ---
> Changes for v2:
> 	Incorporated York's comment to separate out
> 	DDR_CLK_FREQ and SINGLE_SOURCE_CLK code
> 
>  arch/powerpc/cpu/mpc85xx/speed.c          |   22 ++++++++++++++++++++--
>  arch/powerpc/include/asm/config_mpc85xx.h |    1 +
>  arch/powerpc/include/asm/immap_85xx.h     |    3 +++
>  3 files changed, 24 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
> index 46ae80c..ef52669 100644
> --- a/arch/powerpc/cpu/mpc85xx/speed.c
> +++ b/arch/powerpc/cpu/mpc85xx/speed.c
> @@ -76,10 +76,28 @@ void get_sys_info(sys_info_t *sys_info)
>  	uint mem_pll_rat;
>  
>  	sys_info->freq_systembus = sysclk;
> +#ifdef CONFIG_SINGLE_SOURCE_CLK
> +	/*
> +	 * DDR_REFCLK_SEL rcw bit is used to determine if DDR PLLS
> +	 * are driven by separate DDR Refclock or single source
> +	 * differential clock.
> +	 */
> +	uint single_src;

Sorry I missed this earlier. Please don't declare variables in the
middle of a function.

York