From: Tom Rini <trini@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] am335x: cpsw: optimize cpsw_recv to increase network performance
Date: Thu, 12 Dec 2013 07:37:16 -0500 [thread overview]
Message-ID: <52A9ADFC.3050907@ti.com> (raw)
In-Reply-To: <52A9752B.9090103@denx.de>
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On 12/12/2013 03:34 AM, Stefan Roese wrote:
> On 04.12.2013 23:05, Tom Rini wrote:
>> On Thu, Nov 28, 2013 at 10:38:40AM +0100, Vladimir Koutny wrote:
>>
>>> In 48ec5291, only TX path was optimized; this does the same
>>> also for RX path. This results in huge increase of TFTP
>>> throughput on custom am3352 board (from 312KiB/s to 1.8MiB/s)
>>> and eliminates occasional transfer timeouts.
>>>
>>> Signed-off-by: Vladimir Koutny
>>> <vladimir.koutny@streamunlimited.com> Cc: Mugunthan V N
>>> <mugunthanvnm@ti.com> Cc: Joe Hershberger
>>> <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
>>
>> Applied to u-boot-ti/master, thanks!
>
> I just tested on dxr2 (AM3352 based board) with latest mainline
> U-Boot. And the network performance is a bit better. But not as
> good as yours. Here my numbers:
>
> Without this patch: ~400 KiB/s With this patch: ~570 KiB/s
>
> Any ideas what might be missing on my platform? Why the speed is
> not as good?
I only got a small increase as well until I also grabbed the dcache
enable patch. I need to find some time today to clean out the TI
queue again.
- --
Tom
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next prev parent reply other threads:[~2013-12-12 12:37 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-28 9:38 [U-Boot] [PATCH] am335x: cpsw: optimize cpsw_recv to increase network performance Vladimir Koutny
2013-11-28 9:55 ` Mugunthan V N
2013-12-04 22:05 ` [U-Boot] " Tom Rini
2013-12-12 8:34 ` Stefan Roese
2013-12-12 12:37 ` Tom Rini [this message]
2013-12-12 13:20 ` Vladimir Koutny
2013-12-12 13:24 ` Stefan Roese
2013-12-12 13:39 ` Tom Rini
2013-12-12 13:45 ` Stefan Roese
2013-12-12 13:49 ` Tom Rini
2013-12-12 13:53 ` Stefan Roese
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