From mboxrd@z Thu Jan  1 00:00:00 1970
From: Tom Rini <trini@ti.com>
Date: Thu, 12 Dec 2013 08:49:02 -0500
Subject: [U-Boot] am335x: cpsw: optimize cpsw_recv to increase network
 performance
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On 12/12/2013 08:45 AM, Stefan Roese wrote:
> On 12.12.2013 14:39, Tom Rini wrote:
>>>> Good point - indeed I had I/D caches enabled for other reasons
>>>> already (md5/sha1 caclulations, ..)
>>>
>>> Hmmm. I expected that caches are enabled already. Since I didn't
>>> see any "D-Cache disabled message" in the startup log.
>>>
>>> If this is not that case, then such cache support would be greatly 
>>> appreciated. :)
>>
>> Check your logs?  Unless you've also got a patched tree you should see
>> "WARNING: Caches disabled" or so, because, yeah, oops, am335x got in
>> with caches disabled, and then I forgot about it.
> 
> This is what I got currently (mainline):
> 
> U-Boot 2014.01-rc1-00165-ge03c76c (Dec 12 2013 - 09:26:20)
> 
> I2C:   ready
> DRAM:  128 MiB
> Enable d-cache
> DFU USB: VID = 0x 908, PID = 0x 2d2
> NAND:  256 MiB
> MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
> Net:   cpsw
> 
> So caches seem to be enabled, right? Or is i-cache still missing?

Ug, the siemens board code enables dcache on its own.  Need to take care
of that.  That said, it's the same one-liner the rest of the patches do,
sans printf.  I think you may need to do more investigation.

- -- 
Tom
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