From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Thu, 12 Dec 2013 14:53:40 +0100 Subject: [U-Boot] am335x: cpsw: optimize cpsw_recv to increase network performance In-Reply-To: <52A9BECE.6050402@ti.com> References: <52970F20.6070401@streamunlimited.com> <20131204220510.GJ420@bill-the-cat> <52A9752B.9090103@denx.de> <52A9ADFC.3050907@ti.com> <52A9B800.5020402@streamunlimited.com> <52A9B923.4020206@denx.de> <52A9BCA3.8000903@ti.com> <52A9BDDD.60502@denx.de> <52A9BECE.6050402@ti.com> Message-ID: <52A9BFE4.1010007@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 12.12.2013 14:49, Tom Rini wrote: >>> Check your logs? Unless you've also got a patched tree you should see >>> "WARNING: Caches disabled" or so, because, yeah, oops, am335x got in >>> with caches disabled, and then I forgot about it. >> >> This is what I got currently (mainline): >> >> U-Boot 2014.01-rc1-00165-ge03c76c (Dec 12 2013 - 09:26:20) >> >> I2C: ready >> DRAM: 128 MiB >> Enable d-cache >> DFU USB: VID = 0x 908, PID = 0x 2d2 >> NAND: 256 MiB >> MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 >> Net: cpsw >> >> So caches seem to be enabled, right? Or is i-cache still missing? > > Ug, the siemens board code enables dcache on its own. Need to take care > of that. That said, it's the same one-liner the rest of the patches do, > sans printf. I think you may need to do more investigation. Yes, will do (once the issue gets more pressing). Thanks, Stefan