From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Tue, 17 Dec 2013 18:44:58 +0100 Subject: [U-Boot] [PATCH v2] mx6: clock: Fix the calculation of PLL_ENET frequency In-Reply-To: <1386102373-13468-1-git-send-email-festevam@gmail.com> References: <1386102373-13468-1-git-send-email-festevam@gmail.com> Message-ID: <52B08D9A.6070807@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 03/12/2013 21:26, Fabio Estevam wrote: > From: Fabio Estevam > > According to the mx6 quad reference manual, the DIV_SELECT field of register > CCM_ANALOG_PLL_ENETn has the following meaning: > > "Controls the frequency of the ethernet reference clock. > - 00 - 25MHz > - 01 - 50MHz > - 10 - 100MHz > - 11 - 125MHz" > > Current logic does not handle the 25MHz case correctly, so fix it. > > Signed-off-by: Rabeeh Khoury > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================