* [U-Boot] [PATCH 1/8] am33xx/omap: Allow cache enable for all Sitara/OMAP
2013-10-02 14:44 [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
@ 2013-10-02 14:44 ` Simon Glass
2013-10-02 14:44 ` [U-Boot] [PATCH 2/8] hash: Export functions to find and show hash Simon Glass
` (7 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Simon Glass @ 2013-10-02 14:44 UTC (permalink / raw)
To: u-boot
Enable the cache for all devices, unless CONFIG_SYS_DCACHE_OFF is defined.
This speeds up the Beaglebone Black boot considerable.
(Tested only on Beaglebone Black with SD card boot)
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/cpu/armv7/omap-common/Makefile | 4 ++
arch/arm/cpu/armv7/omap-common/hwinit-common.c | 41 -------------------
arch/arm/cpu/armv7/omap-common/omap-cache.c | 56 ++++++++++++++++++++++++++
arch/arm/cpu/armv7/omap3/board.c | 8 ----
board/siemens/common/board.c | 9 -----
5 files changed, 60 insertions(+), 58 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap-common/omap-cache.c
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile
index 75b3753..3487972 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -21,6 +21,10 @@ COBJS += vc.o
COBJS += abb.o
endif
+ifeq ($(CONFIG_SYS_DCACHE_OFF),)
+COBJS += omap-cache.o
+endif
+
ifeq ($(CONFIG_OMAP34XX),)
COBJS += boot-common.o
SOBJS += lowlevel_init.o
diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
index 85d3754..74f5e45 100644
--- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
@@ -18,13 +18,8 @@
#include <asm/emif.h>
#include <asm/omap_common.h>
#include <linux/compiler.h>
-#include <asm/cache.h>
#include <asm/system.h>
-#define ARMV7_DCACHE_WRITEBACK 0xe
-#define ARMV7_DOMAIN_CLIENT 1
-#define ARMV7_DOMAIN_MASK (0x3 << 0)
-
DECLARE_GLOBAL_DATA_PTR;
void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
@@ -264,39 +259,3 @@ int print_cpuinfo(void)
return 0;
}
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
- /* Enable D-cache. I-cache is already enabled in start.S */
- dcache_enable();
-}
-
-void dram_bank_mmu_setup(int bank)
-{
- bd_t *bd = gd->bd;
- int i;
-
- u32 start = bd->bi_dram[bank].start >> 20;
- u32 size = bd->bi_dram[bank].size >> 20;
- u32 end = start + size;
-
- debug("%s: bank: %d\n", __func__, bank);
- for (i = start; i < end; i++)
- set_section_dcache(i, ARMV7_DCACHE_WRITEBACK);
-
-}
-
-void arm_init_domains(void)
-{
- u32 reg;
-
- reg = get_dacr();
- /*
- * Set DOMAIN to client access so that all permissions
- * set in pagetables are validated by the mmu.
- */
- reg &= ~ARMV7_DOMAIN_MASK;
- reg |= ARMV7_DOMAIN_CLIENT;
- set_dacr(reg);
-}
-#endif
diff --git a/arch/arm/cpu/armv7/omap-common/omap-cache.c b/arch/arm/cpu/armv7/omap-common/omap-cache.c
new file mode 100644
index 0000000..579bebf
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/omap-cache.c
@@ -0,0 +1,56 @@
+/*
+ *
+ * Common functions for OMAP4/5 based boards
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Author :
+ * Aneesh V <aneesh@ti.com>
+ * Steve Sakoman <steve@sakoman.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/cache.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ARMV7_DCACHE_WRITEBACK 0xe
+#define ARMV7_DOMAIN_CLIENT 1
+#define ARMV7_DOMAIN_MASK (0x3 << 0)
+
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+
+void dram_bank_mmu_setup(int bank)
+{
+ bd_t *bd = gd->bd;
+ int i;
+
+ u32 start = bd->bi_dram[bank].start >> 20;
+ u32 size = bd->bi_dram[bank].size >> 20;
+ u32 end = start + size;
+
+ debug("%s: bank: %d\n", __func__, bank);
+ for (i = start; i < end; i++)
+ set_section_dcache(i, ARMV7_DCACHE_WRITEBACK);
+}
+
+void arm_init_domains(void)
+{
+ u32 reg;
+
+ reg = get_dacr();
+ /*
+ * Set DOMAIN to client access so that all permissions
+ * set in pagetables are validated by the mmu.
+ */
+ reg &= ~ARMV7_DOMAIN_MASK;
+ reg |= ARMV7_DOMAIN_CLIENT;
+ set_dacr(reg);
+}
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 7d1f8d9..fd12cdc 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -478,11 +478,3 @@ void omap3_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif /* !CONFIG_SYS_L2CACHE_OFF */
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
- /* Enable D-cache. I-cache is already enabled in start.S */
- dcache_enable();
-}
-#endif /* !CONFIG_SYS_DCACHE_OFF */
diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index 6279c32..c3c7f2d 100644
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -159,13 +159,4 @@ U_BOOT_CMD(
"Sends U-Boot into infinite loop",
""
);
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
- printf("Enable d-cache\n");
- /* Enable D-cache. I-cache is already enabled in start.S */
- dcache_enable();
-}
-#endif /* CONFIG_SYS_DCACHE_OFF */
#endif /* !CONFIG_SPL_BUILD */
--
1.8.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [U-Boot] [PATCH 2/8] hash: Export functions to find and show hash
2013-10-02 14:44 [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
2013-10-02 14:44 ` [U-Boot] [PATCH 1/8] am33xx/omap: Allow cache enable for all Sitara/OMAP Simon Glass
@ 2013-10-02 14:44 ` Simon Glass
2013-10-02 14:44 ` [U-Boot] [PATCH 3/8] fdt: Add DEV_TREE_BIN option to specify a device tree binary file Simon Glass
` (6 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Simon Glass @ 2013-10-02 14:44 UTC (permalink / raw)
To: u-boot
These functions are generally useful for displaying a hash value and finding
available algorithms, so export them.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
common/hash.c | 13 ++++++-------
include/hash.h | 22 ++++++++++++++++++++++
2 files changed, 28 insertions(+), 7 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index 722c40b..7b34e83 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -204,7 +204,7 @@ static int parse_verify_sum(struct hash_algo *algo, char *verify_str, u8 *vsum,
return 0;
}
-static struct hash_algo *find_hash_algo(const char *name)
+struct hash_algo *hash_find_algo(const char *name)
{
int i;
@@ -216,8 +216,7 @@ static struct hash_algo *find_hash_algo(const char *name)
return NULL;
}
-static void show_hash(struct hash_algo *algo, ulong addr, ulong len,
- u8 *output)
+void hash_show(struct hash_algo *algo, ulong addr, ulong len, u8 *output)
{
int i;
@@ -231,7 +230,7 @@ int hash_block(const char *algo_name, const void *data, unsigned int len,
{
struct hash_algo *algo;
- algo = find_hash_algo(algo_name);
+ algo = hash_find_algo(algo_name);
if (!algo) {
debug("Unknown hash algorithm '%s'\n", algo_name);
return -EPROTONOSUPPORT;
@@ -265,7 +264,7 @@ int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag,
u8 vsum[HASH_MAX_DIGEST_SIZE];
void *buf;
- algo = find_hash_algo(algo_name);
+ algo = hash_find_algo(algo_name);
if (!algo) {
printf("Unknown hash algorithm '%s'\n", algo_name);
return CMD_RET_USAGE;
@@ -298,7 +297,7 @@ int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag,
if (memcmp(output, vsum, algo->digest_size) != 0) {
int i;
- show_hash(algo, addr, len, output);
+ hash_show(algo, addr, len, output);
printf(" != ");
for (i = 0; i < algo->digest_size; i++)
printf("%02x", vsum[i]);
@@ -306,7 +305,7 @@ int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag,
return 1;
}
} else {
- show_hash(algo, addr, len, output);
+ hash_show(algo, addr, len, output);
printf("\n");
if (argc) {
diff --git a/include/hash.h b/include/hash.h
index e92d272..c69bc25 100644
--- a/include/hash.h
+++ b/include/hash.h
@@ -77,4 +77,26 @@ int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag,
int hash_block(const char *algo_name, const void *data, unsigned int len,
uint8_t *output, int *output_size);
+/**
+ * hash_find_algo() - Find an algorithm by name
+ *
+ * @name: Name of algorithm to search for
+ * @return pointer to algorithm structure, or NULL if not found
+ */
+struct hash_algo *hash_find_algo(const char *name);
+
+/**
+ * hash_show() - Print out a hash algorithm and value
+ *
+ * You will get a message like this (without a newline at the end):
+ *
+ * "sha1 for 9eb3337c ... 9eb3338f ==> 7942ef1df479fd3130f716eb9613d107dab7e257"
+ *
+ * @algo: Algorithm used for hash
+ * @addr: Address of data that was hashed
+ * @len: Length of data that was hashed
+ * @output: Hash value to display
+ */
+void hash_show(struct hash_algo *algo, ulong addr, ulong len, u8 *output);
+
#endif
--
1.8.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [U-Boot] [PATCH 3/8] fdt: Add DEV_TREE_BIN option to specify a device tree binary file
2013-10-02 14:44 [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
2013-10-02 14:44 ` [U-Boot] [PATCH 1/8] am33xx/omap: Allow cache enable for all Sitara/OMAP Simon Glass
2013-10-02 14:44 ` [U-Boot] [PATCH 2/8] hash: Export functions to find and show hash Simon Glass
@ 2013-10-02 14:44 ` Simon Glass
2013-10-02 14:44 ` [U-Boot] [PATCH 4/8] fdt: Update functions which write to an FDT to return -ENOSPC Simon Glass
` (5 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Simon Glass @ 2013-10-02 14:44 UTC (permalink / raw)
To: u-boot
In some cases, an externally-built device tree binary is required to be
attached to U-Boot. An example is when using image signing, since in that
case the .dtb file must include the public keys.
Add a DEV_TREE_BIN option to the Makefile, and update the documentation.
Usage is something like:
make DEV_TREE_BIN=boot/am335x-boneblack-pubkey.dtb
Signed-off-by: Simon Glass <sjg@chromium.org>
---
Makefile | 8 +++++++-
doc/README.fdt-control | 16 ++++++++++++++--
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/Makefile b/Makefile
index 07abef4..c651af0 100644
--- a/Makefile
+++ b/Makefile
@@ -416,9 +416,15 @@ endif
all: $(ALL-y) $(SUBDIR_EXAMPLES)
+# Allow a device tree binary to be given as a make argument
+ifneq ($(DEV_TREE_BIN),)
+$(obj)u-boot.dtb:
+ cp $(DEV_TREE_BIN) $@
+else
$(obj)u-boot.dtb: checkdtc $(obj)u-boot
$(MAKE) -C dts binary
mv $(obj)dts/dt.dtb $@
+endif
$(obj)u-boot-dtb.bin: $(obj)u-boot.bin $(obj)u-boot.dtb
cat $^ >$@
@@ -452,7 +458,7 @@ ifndef CONFIG_SYS_UBOOT_START
CONFIG_SYS_UBOOT_START := 0
endif
-$(obj)u-boot.img: $(obj)u-boot.bin
+$(obj)u-boot.img: $(obj)u-boot$(if $(CONFIG_OF_SEPARATE),-dtb,).bin
$(obj)tools/mkimage -A $(ARCH) -T firmware -C none \
-O u-boot -a $(CONFIG_SYS_TEXT_BASE) \
-e $(CONFIG_SYS_UBOOT_START) \
diff --git a/doc/README.fdt-control b/doc/README.fdt-control
index 86bae68..8a4aa7a 100644
--- a/doc/README.fdt-control
+++ b/doc/README.fdt-control
@@ -122,7 +122,8 @@ This should include your CPU or SOC's device tree file, placed in
arch/<arch>/dts, and then make any adjustments required.
If CONFIG_OF_EMBED is defined, then it will be picked up and built into
-the U-Boot image (including u-boot.bin).
+the U-Boot image (including u-boot.bin). This is suitable for debugging
+and development only and is not recommended for production devices.
If CONFIG_OF_SEPARATE is defined, then it will be built and placed in
a u-boot.dtb file alongside u-boot.bin. A common approach is then to
@@ -130,7 +131,10 @@ join the two:
cat u-boot.bin u-boot.dtb >image.bin
-and then flash image.bin onto your board.
+and then flash image.bin onto your board. Note that U-Boot creates
+u-boot-dtb.bin which does the above step for you also. If you are using
+CONFIG_SPL_FRAMEWORK, then u-boot.img will be built to include the device
+tree binary.
If CONFIG_OF_HOSTFILE is defined, then it will be read from a file on
startup. This is only useful for sandbox. Use the -d flag to U-Boot to
@@ -138,6 +142,14 @@ specify the file to read.
You cannot use more than one of these options at the same time.
+To use a device tree file that you have compiled yourself, pass
+DEV_TREE_BIN=<filename> to 'make', as in:
+
+ make DEV_TREE_BIN=boot/am335x-boneblack-pubkey.dtb
+
+Then U-Boot will copy that file to u-boot.dtb, put it in the .img file
+if used, and u-boot-dtb.bin.
+
If you wish to put the fdt at a different address in memory, you can
define the "fdtcontroladdr" environment variable. This is the hex
address of the fdt binary blob, and will override either of the options.
--
1.8.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [U-Boot] [PATCH 4/8] fdt: Update functions which write to an FDT to return -ENOSPC
2013-10-02 14:44 [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
` (2 preceding siblings ...)
2013-10-02 14:44 ` [U-Boot] [PATCH 3/8] fdt: Add DEV_TREE_BIN option to specify a device tree binary file Simon Glass
@ 2013-10-02 14:44 ` Simon Glass
2013-10-02 14:44 ` [U-Boot] [PATCH 5/8] arm: ti: Increase malloc size to 16MB for armv7 boards Simon Glass
` (4 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Simon Glass @ 2013-10-02 14:44 UTC (permalink / raw)
To: u-boot
When writing values into an FDT it is possible that there will be
insufficient space. If the caller gets a useful error in the then it can
potentially deal with the situation.
Adjust these functions to return -ENOSPC when the FDT is full.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
common/image-fit.c | 4 ++--
include/rsa.h | 3 ++-
lib/rsa/rsa-sign.c | 28 +++++++++++++++++++---------
3 files changed, 23 insertions(+), 12 deletions(-)
diff --git a/common/image-fit.c b/common/image-fit.c
index cf4b67e..8c866f8 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -832,7 +832,7 @@ static int fit_image_hash_get_ignore(const void *fit, int noffset, int *ignore)
*
* returns:
* 0, on success
- * -1, on property read failure
+ * -ENOSPC if no space in device tree, -1 for other error
*/
int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
{
@@ -846,7 +846,7 @@ int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
printf("Can't set '%s' property for '%s' node (%s)\n",
FIT_TIMESTAMP_PROP, fit_get_name(fit, noffset, NULL),
fdt_strerror(ret));
- return -1;
+ return ret == -FDT_ERR_NOSPACE ? -ENOSPC : -1;
}
return 0;
diff --git a/include/rsa.h b/include/rsa.h
index add4c78..0db76cc 100644
--- a/include/rsa.h
+++ b/include/rsa.h
@@ -46,7 +46,8 @@ int rsa_sign(struct image_sign_info *info,
*
* @info: Specifies key and FIT information
* @keydest: Destination FDT blob for public key data
- * @return: 0, on success, -ve on error
+ * @return: 0, on success, -ENOSPC if the keydest FDT blob ran out of space,
+ other -ve value on error
*/
int rsa_add_verify_data(struct image_sign_info *info, void *keydest);
#else
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 549130e..ef9a2f4 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -427,20 +427,30 @@ int rsa_add_verify_data(struct image_sign_info *info, void *keydest)
ret = fdt_setprop_string(keydest, node, "key-name-hint",
info->keyname);
- ret |= fdt_setprop_u32(keydest, node, "rsa,num-bits", bits);
- ret |= fdt_setprop_u32(keydest, node, "rsa,n0-inverse", n0_inv);
- ret |= fdt_add_bignum(keydest, node, "rsa,modulus", modulus, bits);
- ret |= fdt_add_bignum(keydest, node, "rsa,r-squared", r_squared, bits);
- ret |= fdt_setprop_string(keydest, node, FIT_ALGO_PROP,
- info->algo->name);
+ if (!ret)
+ ret = fdt_setprop_u32(keydest, node, "rsa,num-bits", bits);
+ if (!ret)
+ ret = fdt_setprop_u32(keydest, node, "rsa,n0-inverse", n0_inv);
+ if (!ret) {
+ ret = fdt_add_bignum(keydest, node, "rsa,modulus", modulus,
+ bits);
+ }
+ if (!ret) {
+ ret = fdt_add_bignum(keydest, node, "rsa,r-squared", r_squared,
+ bits);
+ }
+ if (!ret) {
+ ret = fdt_setprop_string(keydest, node, FIT_ALGO_PROP,
+ info->algo->name);
+ }
if (info->require_keys) {
- fdt_setprop_string(keydest, node, "required",
- info->require_keys);
+ ret = fdt_setprop_string(keydest, node, "required",
+ info->require_keys);
}
BN_free(modulus);
BN_free(r_squared);
if (ret)
- return -EIO;
+ return ret == FDT_ERR_NOSPACE ? -ENOSPC : -EIO;
return 0;
}
--
1.8.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [U-Boot] [PATCH 5/8] arm: ti: Increase malloc size to 16MB for armv7 boards
2013-10-02 14:44 [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
` (3 preceding siblings ...)
2013-10-02 14:44 ` [U-Boot] [PATCH 4/8] fdt: Update functions which write to an FDT to return -ENOSPC Simon Glass
@ 2013-10-02 14:44 ` Simon Glass
2013-10-02 14:44 ` [U-Boot] [PATCH 6/8] RFC: am33xx/omap: Enable CONFIG_OF_CONTROL Simon Glass
` (3 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Simon Glass @ 2013-10-02 14:44 UTC (permalink / raw)
To: u-boot
The current size of 1MB is not enough use to use DFU. Increase it for
ARMv7 boards, all of which should have 32MB or more SDRAM.
With this change it is possible to do 'dfu mmc 0' on a Beaglebone Black.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/ti_armv7_common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index e89e874..cf7d07d 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -102,7 +102,7 @@
* we are on so we do not need to rely on the command prompt. We set a
* console baudrate of 115200 and use the default baud rate table.
*/
-#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
+#define CONFIG_SYS_MALLOC_LEN (16 << 20)
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "U-Boot# "
#define CONFIG_SYS_CONSOLE_INFO_QUIET
--
1.8.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [U-Boot] [PATCH 6/8] RFC: am33xx/omap: Enable CONFIG_OF_CONTROL
2013-10-02 14:44 [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
` (4 preceding siblings ...)
2013-10-02 14:44 ` [U-Boot] [PATCH 5/8] arm: ti: Increase malloc size to 16MB for armv7 boards Simon Glass
@ 2013-10-02 14:44 ` Simon Glass
2013-10-02 14:44 ` [U-Boot] [PATCH 7/8] RFC: am33xx/omap: Enable FIT support Simon Glass
` (2 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Simon Glass @ 2013-10-02 14:44 UTC (permalink / raw)
To: u-boot
Add support for device tree control and add device tree files for the
beaglebone black initially.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/am33xx.dtsi | 649 ++++++++++++++++++++++++++++++
arch/arm/dts/dt-bindings/gpio/gpio.h | 15 +
arch/arm/dts/dt-bindings/pinctrl/am33xx.h | 41 ++
arch/arm/dts/dt-bindings/pinctrl/omap.h | 54 +++
board/ti/dts/am335x-bone-common.dtsi | 262 ++++++++++++
board/ti/dts/am335x-boneblack.dts | 17 +
board/ti/dts/tps65217.dtsi | 56 +++
include/configs/am335x_evm.h | 6 +
8 files changed, 1100 insertions(+)
create mode 100644 arch/arm/dts/am33xx.dtsi
create mode 100644 arch/arm/dts/dt-bindings/gpio/gpio.h
create mode 100644 arch/arm/dts/dt-bindings/pinctrl/am33xx.h
create mode 100644 arch/arm/dts/dt-bindings/pinctrl/omap.h
create mode 100644 board/ti/dts/am335x-bone-common.dtsi
create mode 100644 board/ti/dts/am335x-boneblack.dts
create mode 100644 board/ti/dts/tps65217.dtsi
diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
new file mode 100644
index 0000000..f9c5da9
--- /dev/null
+++ b/arch/arm/dts/am33xx.dtsi
@@ -0,0 +1,649 @@
+/*
+ * Device Tree Source for AM33XX SoC
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/am33xx.h>
+
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "ti,am33xx";
+ interrupt-parent = <&intc>;
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ serial5 = &uart5;
+ d_can0 = &dcan0;
+ d_can1 = &dcan1;
+ usb0 = &usb0;
+ usb1 = &usb1;
+ phy0 = &usb0_phy;
+ phy1 = &usb1_phy;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu at 0 {
+ compatible = "arm,cortex-a8";
+ device_type = "cpu";
+ reg = <0>;
+
+ /*
+ * To consider voltage drop between PMIC and SoC,
+ * tolerance value is reduced to 2% from 4% and
+ * voltage value is increased as a precaution.
+ */
+ operating-points = <
+ /* kHz uV */
+ 720000 1285000
+ 600000 1225000
+ 500000 1125000
+ 275000 1125000
+ >;
+ voltage-tolerance = <2>; /* 2 percentage */
+ clock-latency = <300000>; /* From omap-cpufreq driver */
+ };
+ };
+
+ /*
+ * The soc node represents the soc top level view. It is uses for IPs
+ * that are not memory mapped in the MPU view or for the MPU itself.
+ */
+ soc {
+ compatible = "ti,omap-infra";
+ mpu {
+ compatible = "ti,omap3-mpu";
+ ti,hwmods = "mpu";
+ };
+ };
+
+ am33xx_pinmux: pinmux at 44e10800 {
+ compatible = "pinctrl-single";
+ reg = <0x44e10800 0x0238>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x7f>;
+ };
+
+ /*
+ * XXX: Use a flat representation of the AM33XX interconnect.
+ * The real AM33XX interconnect network is quite complex.Since
+ * that will not bring real advantage to represent that in DT
+ * for the moment, just use a fake OCP bus entry to represent
+ * the whole bus hierarchy.
+ */
+ ocp {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ ti,hwmods = "l3_main";
+
+ intc: interrupt-controller at 48200000 {
+ compatible = "ti,omap2-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ ti,intc-size = <128>;
+ reg = <0x48200000 0x1000>;
+ };
+
+ gpio0: gpio at 44e07000 {
+ compatible = "ti,omap4-gpio";
+ ti,hwmods = "gpio1";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x44e07000 0x1000>;
+ interrupts = <96>;
+ };
+
+ gpio1: gpio at 4804c000 {
+ compatible = "ti,omap4-gpio";
+ ti,hwmods = "gpio2";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x4804c000 0x1000>;
+ interrupts = <98>;
+ };
+
+ gpio2: gpio at 481ac000 {
+ compatible = "ti,omap4-gpio";
+ ti,hwmods = "gpio3";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x481ac000 0x1000>;
+ interrupts = <32>;
+ };
+
+ gpio3: gpio at 481ae000 {
+ compatible = "ti,omap4-gpio";
+ ti,hwmods = "gpio4";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x481ae000 0x1000>;
+ interrupts = <62>;
+ };
+
+ uart0: serial at 44e09000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart1";
+ clock-frequency = <48000000>;
+ reg = <0x44e09000 0x2000>;
+ interrupts = <72>;
+ status = "disabled";
+ };
+
+ uart1: serial at 48022000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart2";
+ clock-frequency = <48000000>;
+ reg = <0x48022000 0x2000>;
+ interrupts = <73>;
+ status = "disabled";
+ };
+
+ uart2: serial at 48024000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart3";
+ clock-frequency = <48000000>;
+ reg = <0x48024000 0x2000>;
+ interrupts = <74>;
+ status = "disabled";
+ };
+
+ uart3: serial at 481a6000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart4";
+ clock-frequency = <48000000>;
+ reg = <0x481a6000 0x2000>;
+ interrupts = <44>;
+ status = "disabled";
+ };
+
+ uart4: serial at 481a8000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart5";
+ clock-frequency = <48000000>;
+ reg = <0x481a8000 0x2000>;
+ interrupts = <45>;
+ status = "disabled";
+ };
+
+ uart5: serial at 481aa000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart6";
+ clock-frequency = <48000000>;
+ reg = <0x481aa000 0x2000>;
+ interrupts = <46>;
+ status = "disabled";
+ };
+
+ i2c0: i2c at 44e0b000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c1";
+ reg = <0x44e0b000 0x1000>;
+ interrupts = <70>;
+ status = "disabled";
+ };
+
+ i2c1: i2c at 4802a000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c2";
+ reg = <0x4802a000 0x1000>;
+ interrupts = <71>;
+ status = "disabled";
+ };
+
+ i2c2: i2c at 4819c000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c3";
+ reg = <0x4819c000 0x1000>;
+ interrupts = <30>;
+ status = "disabled";
+ };
+
+ wdt2: wdt at 44e35000 {
+ compatible = "ti,omap3-wdt";
+ ti,hwmods = "wd_timer2";
+ reg = <0x44e35000 0x1000>;
+ interrupts = <91>;
+ };
+
+ dcan0: d_can at 481cc000 {
+ compatible = "bosch,d_can";
+ ti,hwmods = "d_can0";
+ reg = <0x481cc000 0x2000
+ 0x44e10644 0x4>;
+ interrupts = <52>;
+ status = "disabled";
+ };
+
+ dcan1: d_can at 481d0000 {
+ compatible = "bosch,d_can";
+ ti,hwmods = "d_can1";
+ reg = <0x481d0000 0x2000
+ 0x44e10644 0x4>;
+ interrupts = <55>;
+ status = "disabled";
+ };
+
+ timer1: timer at 44e31000 {
+ compatible = "ti,am335x-timer-1ms";
+ reg = <0x44e31000 0x400>;
+ interrupts = <67>;
+ ti,hwmods = "timer1";
+ ti,timer-alwon;
+ };
+
+ timer2: timer at 48040000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x48040000 0x400>;
+ interrupts = <68>;
+ ti,hwmods = "timer2";
+ };
+
+ timer3: timer at 48042000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x48042000 0x400>;
+ interrupts = <69>;
+ ti,hwmods = "timer3";
+ };
+
+ timer4: timer at 48044000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x48044000 0x400>;
+ interrupts = <92>;
+ ti,hwmods = "timer4";
+ ti,timer-pwm;
+ };
+
+ timer5: timer at 48046000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x48046000 0x400>;
+ interrupts = <93>;
+ ti,hwmods = "timer5";
+ ti,timer-pwm;
+ };
+
+ timer6: timer at 48048000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x48048000 0x400>;
+ interrupts = <94>;
+ ti,hwmods = "timer6";
+ ti,timer-pwm;
+ };
+
+ timer7: timer at 4804a000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x4804a000 0x400>;
+ interrupts = <95>;
+ ti,hwmods = "timer7";
+ ti,timer-pwm;
+ };
+
+ rtc at 44e3e000 {
+ compatible = "ti,da830-rtc";
+ reg = <0x44e3e000 0x1000>;
+ interrupts = <75
+ 76>;
+ ti,hwmods = "rtc";
+ };
+
+ spi0: spi at 48030000 {
+ compatible = "ti,omap4-mcspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x48030000 0x400>;
+ interrupts = <65>;
+ ti,spi-num-cs = <2>;
+ ti,hwmods = "spi0";
+ status = "disabled";
+ };
+
+ spi1: spi at 481a0000 {
+ compatible = "ti,omap4-mcspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x481a0000 0x400>;
+ interrupts = <125>;
+ ti,spi-num-cs = <2>;
+ ti,hwmods = "spi1";
+ status = "disabled";
+ };
+
+ usb: usb at 47400000 {
+ compatible = "ti,am33xx-usb";
+ reg = <0x47400000 0x1000>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ti,hwmods = "usb_otg_hs";
+ status = "disabled";
+
+ ctrl_mod: control at 44e10000 {
+ compatible = "ti,am335x-usb-ctrl-module";
+ reg = <0x44e10620 0x10
+ 0x44e10648 0x4>;
+ reg-names = "phy_ctrl", "wakeup";
+ status = "disabled";
+ };
+
+ usb0_phy: usb-phy at 47401300 {
+ compatible = "ti,am335x-usb-phy";
+ reg = <0x47401300 0x100>;
+ reg-names = "phy";
+ status = "disabled";
+ ti,ctrl_mod = <&ctrl_mod>;
+ };
+
+ usb0: usb at 47401000 {
+ compatible = "ti,musb-am33xx";
+ status = "disabled";
+ reg = <0x47401400 0x400
+ 0x47401000 0x200>;
+ reg-names = "mc", "control";
+
+ interrupts = <18>;
+ interrupt-names = "mc";
+ dr_mode = "otg";
+ mentor,multipoint = <1>;
+ mentor,num-eps = <16>;
+ mentor,ram-bits = <12>;
+ mentor,power = <500>;
+ phys = <&usb0_phy>;
+
+ dmas = <&cppi41dma 0 0 &cppi41dma 1 0
+ &cppi41dma 2 0 &cppi41dma 3 0
+ &cppi41dma 4 0 &cppi41dma 5 0
+ &cppi41dma 6 0 &cppi41dma 7 0
+ &cppi41dma 8 0 &cppi41dma 9 0
+ &cppi41dma 10 0 &cppi41dma 11 0
+ &cppi41dma 12 0 &cppi41dma 13 0
+ &cppi41dma 14 0 &cppi41dma 0 1
+ &cppi41dma 1 1 &cppi41dma 2 1
+ &cppi41dma 3 1 &cppi41dma 4 1
+ &cppi41dma 5 1 &cppi41dma 6 1
+ &cppi41dma 7 1 &cppi41dma 8 1
+ &cppi41dma 9 1 &cppi41dma 10 1
+ &cppi41dma 11 1 &cppi41dma 12 1
+ &cppi41dma 13 1 &cppi41dma 14 1>;
+ dma-names =
+ "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
+ "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
+ "rx14", "rx15",
+ "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
+ "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
+ "tx14", "tx15";
+ };
+
+ usb1_phy: usb-phy at 47401b00 {
+ compatible = "ti,am335x-usb-phy";
+ reg = <0x47401b00 0x100>;
+ reg-names = "phy";
+ status = "disabled";
+ ti,ctrl_mod = <&ctrl_mod>;
+ };
+
+ usb1: usb at 47401800 {
+ compatible = "ti,musb-am33xx";
+ status = "disabled";
+ reg = <0x47401c00 0x400
+ 0x47401800 0x200>;
+ reg-names = "mc", "control";
+ interrupts = <19>;
+ interrupt-names = "mc";
+ dr_mode = "otg";
+ mentor,multipoint = <1>;
+ mentor,num-eps = <16>;
+ mentor,ram-bits = <12>;
+ mentor,power = <500>;
+ phys = <&usb1_phy>;
+
+ dmas = <&cppi41dma 15 0 &cppi41dma 16 0
+ &cppi41dma 17 0 &cppi41dma 18 0
+ &cppi41dma 19 0 &cppi41dma 20 0
+ &cppi41dma 21 0 &cppi41dma 22 0
+ &cppi41dma 23 0 &cppi41dma 24 0
+ &cppi41dma 25 0 &cppi41dma 26 0
+ &cppi41dma 27 0 &cppi41dma 28 0
+ &cppi41dma 29 0 &cppi41dma 15 1
+ &cppi41dma 16 1 &cppi41dma 17 1
+ &cppi41dma 18 1 &cppi41dma 19 1
+ &cppi41dma 20 1 &cppi41dma 21 1
+ &cppi41dma 22 1 &cppi41dma 23 1
+ &cppi41dma 24 1 &cppi41dma 25 1
+ &cppi41dma 26 1 &cppi41dma 27 1
+ &cppi41dma 28 1 &cppi41dma 29 1>;
+ dma-names =
+ "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
+ "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
+ "rx14", "rx15",
+ "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
+ "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
+ "tx14", "tx15";
+ };
+
+ cppi41dma: dma-controller at 07402000 {
+ compatible = "ti,am3359-cppi41";
+ reg = <0x47400000 0x1000
+ 0x47402000 0x1000
+ 0x47403000 0x1000
+ 0x47404000 0x4000>;
+ reg-names = "glue", "controller", "scheduler", "queuemgr";
+ interrupts = <17>;
+ interrupt-names = "glue";
+ #dma-cells = <2>;
+ #dma-channels = <30>;
+ #dma-requests = <256>;
+ status = "disabled";
+ };
+ };
+
+ epwmss0: epwmss at 48300000 {
+ compatible = "ti,am33xx-pwmss";
+ reg = <0x48300000 0x10>;
+ ti,hwmods = "epwmss0";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ ranges = <0x48300100 0x48300100 0x80 /* ECAP */
+ 0x48300180 0x48300180 0x80 /* EQEP */
+ 0x48300200 0x48300200 0x80>; /* EHRPWM */
+
+ ecap0: ecap at 48300100 {
+ compatible = "ti,am33xx-ecap";
+ #pwm-cells = <3>;
+ reg = <0x48300100 0x80>;
+ ti,hwmods = "ecap0";
+ status = "disabled";
+ };
+
+ ehrpwm0: ehrpwm at 48300200 {
+ compatible = "ti,am33xx-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x48300200 0x80>;
+ ti,hwmods = "ehrpwm0";
+ status = "disabled";
+ };
+ };
+
+ epwmss1: epwmss at 48302000 {
+ compatible = "ti,am33xx-pwmss";
+ reg = <0x48302000 0x10>;
+ ti,hwmods = "epwmss1";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ ranges = <0x48302100 0x48302100 0x80 /* ECAP */
+ 0x48302180 0x48302180 0x80 /* EQEP */
+ 0x48302200 0x48302200 0x80>; /* EHRPWM */
+
+ ecap1: ecap at 48302100 {
+ compatible = "ti,am33xx-ecap";
+ #pwm-cells = <3>;
+ reg = <0x48302100 0x80>;
+ ti,hwmods = "ecap1";
+ status = "disabled";
+ };
+
+ ehrpwm1: ehrpwm at 48302200 {
+ compatible = "ti,am33xx-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x48302200 0x80>;
+ ti,hwmods = "ehrpwm1";
+ status = "disabled";
+ };
+ };
+
+ epwmss2: epwmss at 48304000 {
+ compatible = "ti,am33xx-pwmss";
+ reg = <0x48304000 0x10>;
+ ti,hwmods = "epwmss2";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ ranges = <0x48304100 0x48304100 0x80 /* ECAP */
+ 0x48304180 0x48304180 0x80 /* EQEP */
+ 0x48304200 0x48304200 0x80>; /* EHRPWM */
+
+ ecap2: ecap at 48304100 {
+ compatible = "ti,am33xx-ecap";
+ #pwm-cells = <3>;
+ reg = <0x48304100 0x80>;
+ ti,hwmods = "ecap2";
+ status = "disabled";
+ };
+
+ ehrpwm2: ehrpwm at 48304200 {
+ compatible = "ti,am33xx-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x48304200 0x80>;
+ ti,hwmods = "ehrpwm2";
+ status = "disabled";
+ };
+ };
+
+ mac: ethernet at 4a100000 {
+ compatible = "ti,cpsw";
+ ti,hwmods = "cpgmac0";
+ cpdma_channels = <8>;
+ ale_entries = <1024>;
+ bd_ram_size = <0x2000>;
+ no_bd_ram = <0>;
+ rx_descs = <64>;
+ mac_control = <0x20>;
+ slaves = <2>;
+ active_slave = <0>;
+ cpts_clock_mult = <0x80000000>;
+ cpts_clock_shift = <29>;
+ reg = <0x4a100000 0x800
+ 0x4a101200 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+ /*
+ * c0_rx_thresh_pend
+ * c0_rx_pend
+ * c0_tx_pend
+ * c0_misc_pend
+ */
+ interrupts = <40 41 42 43>;
+ ranges;
+
+ davinci_mdio: mdio at 4a101000 {
+ compatible = "ti,davinci_mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "davinci_mdio";
+ bus_freq = <1000000>;
+ reg = <0x4a101000 0x100>;
+ };
+
+ cpsw_emac0: slave at 4a100200 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ cpsw_emac1: slave at 4a100300 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+ };
+
+ ocmcram: ocmcram at 40300000 {
+ compatible = "ti,am3352-ocmcram";
+ reg = <0x40300000 0x10000>;
+ ti,hwmods = "ocmcram";
+ };
+
+ wkup_m3: wkup_m3 at 44d00000 {
+ compatible = "ti,am3353-wkup-m3";
+ reg = <0x44d00000 0x4000 /* M3 UMEM */
+ 0x44d80000 0x2000>; /* M3 DMEM */
+ ti,hwmods = "wkup_m3";
+ };
+
+ elm: elm at 48080000 {
+ compatible = "ti,am3352-elm";
+ reg = <0x48080000 0x2000>;
+ interrupts = <4>;
+ ti,hwmods = "elm";
+ status = "disabled";
+ };
+
+ tscadc: tscadc at 44e0d000 {
+ compatible = "ti,am3359-tscadc";
+ reg = <0x44e0d000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <16>;
+ ti,hwmods = "adc_tsc";
+ status = "disabled";
+
+ tsc {
+ compatible = "ti,am3359-tsc";
+ };
+ am335x_adc: adc {
+ #io-channel-cells = <1>;
+ compatible = "ti,am3359-adc";
+ };
+ };
+
+ gpmc: gpmc at 50000000 {
+ compatible = "ti,am3352-gpmc";
+ ti,hwmods = "gpmc";
+ reg = <0x50000000 0x2000>;
+ interrupts = <100>;
+ gpmc,num-cs = <7>;
+ gpmc,num-waitpins = <2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/dts/dt-bindings/gpio/gpio.h b/arch/arm/dts/dt-bindings/gpio/gpio.h
new file mode 100644
index 0000000..e6b1e0a
--- /dev/null
+++ b/arch/arm/dts/dt-bindings/gpio/gpio.h
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants for most GPIO bindings.
+ *
+ * Most GPIO bindings include a flags cell as part of the GPIO specifier.
+ * In most cases, the format of the flags cell uses the standard values
+ * defined in this header.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_GPIO_H
+#define _DT_BINDINGS_GPIO_GPIO_H
+
+#define GPIO_ACTIVE_HIGH 0
+#define GPIO_ACTIVE_LOW 1
+
+#endif
diff --git a/arch/arm/dts/dt-bindings/pinctrl/am33xx.h b/arch/arm/dts/dt-bindings/pinctrl/am33xx.h
new file mode 100644
index 0000000..e8ce360
--- /dev/null
+++ b/arch/arm/dts/dt-bindings/pinctrl/am33xx.h
@@ -0,0 +1,41 @@
+/*
+ * This header provides constants specific to AM33XX pinctrl bindings.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_AM33XX_H
+#define _DT_BINDINGS_PINCTRL_AM33XX_H
+
+#include <dt-bindings/pinctrl/omap.h>
+
+/* am33xx specific mux bit defines */
+#undef PULL_ENA
+#undef INPUT_EN
+
+#define PULL_DISABLE (1 << 3)
+#define INPUT_EN (1 << 5)
+#define SLEWCTRL_FAST (1 << 6)
+
+/* update macro depending on INPUT_EN and PULL_ENA */
+#undef PIN_OUTPUT
+#undef PIN_OUTPUT_PULLUP
+#undef PIN_OUTPUT_PULLDOWN
+#undef PIN_INPUT
+#undef PIN_INPUT_PULLUP
+#undef PIN_INPUT_PULLDOWN
+
+#define PIN_OUTPUT (PULL_DISABLE)
+#define PIN_OUTPUT_PULLUP (PULL_UP)
+#define PIN_OUTPUT_PULLDOWN 0
+#define PIN_INPUT (INPUT_EN | PULL_DISABLE)
+#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
+#define PIN_INPUT_PULLDOWN (INPUT_EN)
+
+/* undef non-existing modes */
+#undef PIN_OFF_NONE
+#undef PIN_OFF_OUTPUT_HIGH
+#undef PIN_OFF_OUTPUT_LOW
+#undef PIN_OFF_INPUT_PULLUP
+#undef PIN_OFF_INPUT_PULLDOWN
+#undef PIN_OFF_WAKEUPENABLE
+
+#endif
diff --git a/arch/arm/dts/dt-bindings/pinctrl/omap.h b/arch/arm/dts/dt-bindings/pinctrl/omap.h
new file mode 100644
index 0000000..f55855c
--- /dev/null
+++ b/arch/arm/dts/dt-bindings/pinctrl/omap.h
@@ -0,0 +1,54 @@
+/*
+ * This header provides constants for OMAP pinctrl bindings.
+ *
+ * Copyright (C) 2009 Nokia
+ * Copyright (C) 2009-2010 Texas Instruments
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_OMAP_H
+#define _DT_BINDINGS_PINCTRL_OMAP_H
+
+/* 34xx mux mode options for each pin. See TRM for options */
+#define MUX_MODE0 0
+#define MUX_MODE1 1
+#define MUX_MODE2 2
+#define MUX_MODE3 3
+#define MUX_MODE4 4
+#define MUX_MODE5 5
+#define MUX_MODE6 6
+#define MUX_MODE7 7
+
+/* 24xx/34xx mux bit defines */
+#define PULL_ENA (1 << 3)
+#define PULL_UP (1 << 4)
+#define ALTELECTRICALSEL (1 << 5)
+
+/* 34xx specific mux bit defines */
+#define INPUT_EN (1 << 8)
+#define OFF_EN (1 << 9)
+#define OFFOUT_EN (1 << 10)
+#define OFFOUT_VAL (1 << 11)
+#define OFF_PULL_EN (1 << 12)
+#define OFF_PULL_UP (1 << 13)
+#define WAKEUP_EN (1 << 14)
+
+/* 44xx specific mux bit defines */
+#define WAKEUP_EVENT (1 << 15)
+
+/* Active pin states */
+#define PIN_OUTPUT 0
+#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
+#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
+#define PIN_INPUT INPUT_EN
+#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
+#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
+
+/* Off mode states */
+#define PIN_OFF_NONE 0
+#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
+#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
+#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
+#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
+#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
+
+#endif
diff --git a/board/ti/dts/am335x-bone-common.dtsi b/board/ti/dts/am335x-bone-common.dtsi
new file mode 100644
index 0000000..2f66ded
--- /dev/null
+++ b/board/ti/dts/am335x-bone-common.dtsi
@@ -0,0 +1,262 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+ model = "TI AM335x BeagleBone";
+ compatible = "ti,am335x-bone", "ti,am33xx";
+
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&dcdc2_reg>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>; /* 256 MB */
+ };
+
+ am33xx_pinmux: pinmux at 44e10800 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&clkout2_pin>;
+
+ user_leds_s0: user_leds_s0 {
+ pinctrl-single,pins = <
+ 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
+ 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
+ 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
+ 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
+ >;
+ };
+
+ i2c0_pins: pinmux_i2c0_pins {
+ pinctrl-single,pins = <
+ 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
+ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
+ >;
+ };
+
+ uart0_pins: pinmux_uart0_pins {
+ pinctrl-single,pins = <
+ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
+ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+ >;
+ };
+
+ clkout2_pin: pinmux_clkout2_pin {
+ pinctrl-single,pins = <
+ 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+ >;
+ };
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
+ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
+ 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
+ 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
+ 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
+ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
+ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
+ 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
+ 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
+ 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
+ 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
+ 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
+ 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
+ >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 reset value */
+ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
+ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ /* MDIO reset value */
+ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+ };
+
+ ocp {
+ uart0: serial at 44e09000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+
+ status = "okay";
+ };
+
+ musb: usb at 47400000 {
+ status = "okay";
+
+ control at 44e10000 {
+ status = "okay";
+ };
+
+ usb-phy at 47401300 {
+ status = "okay";
+ };
+
+ usb-phy at 47401b00 {
+ status = "okay";
+ };
+
+ usb at 47401000 {
+ status = "okay";
+ };
+
+ usb at 47401800 {
+ status = "okay";
+ dr_mode = "host";
+ };
+
+ dma-controller at 07402000 {
+ status = "okay";
+ };
+ };
+
+ i2c0: i2c at 44e0b000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ tps: tps at 24 {
+ reg = <0x24>;
+ };
+
+ };
+ };
+
+ leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_leds_s0>;
+
+ compatible = "gpio-leds";
+
+ led at 2 {
+ label = "beaglebone:green:heartbeat";
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led at 3 {
+ label = "beaglebone:green:mmc0";
+ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ led at 4 {
+ label = "beaglebone:green:usr2";
+ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led at 5 {
+ label = "beaglebone:green:usr3";
+ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+};
+
+/include/ "tps65217.dtsi"
+
+&tps {
+ regulators {
+ dcdc1_reg: regulator at 0 {
+ regulator-always-on;
+ };
+
+ dcdc2_reg: regulator at 1 {
+ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+ regulator-name = "vdd_mpu";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1325000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ dcdc3_reg: regulator at 2 {
+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: regulator at 3 {
+ regulator-always-on;
+ };
+
+ ldo2_reg: regulator at 4 {
+ regulator-always-on;
+ };
+
+ ldo3_reg: regulator at 5 {
+ regulator-always-on;
+ };
+
+ ldo4_reg: regulator at 6 {
+ regulator-always-on;
+ };
+ };
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <0>;
+ phy-mode = "mii";
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <1>;
+ phy-mode = "mii";
+};
+
+&mac {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+};
diff --git a/board/ti/dts/am335x-boneblack.dts b/board/ti/dts/am335x-boneblack.dts
new file mode 100644
index 0000000..197cadf
--- /dev/null
+++ b/board/ti/dts/am335x-boneblack.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
diff --git a/board/ti/dts/tps65217.dtsi b/board/ti/dts/tps65217.dtsi
new file mode 100644
index 0000000..a632724
--- /dev/null
+++ b/board/ti/dts/tps65217.dtsi
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * Integrated Power Management Chip
+ * http://www.ti.com/lit/ds/symlink/tps65217.pdf
+ */
+
+&tps {
+ compatible = "ti,tps65217";
+
+ regulators {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dcdc1_reg: regulator at 0 {
+ reg = <0>;
+ regulator-compatible = "dcdc1";
+ };
+
+ dcdc2_reg: regulator at 1 {
+ reg = <1>;
+ regulator-compatible = "dcdc2";
+ };
+
+ dcdc3_reg: regulator at 2 {
+ reg = <2>;
+ regulator-compatible = "dcdc3";
+ };
+
+ ldo1_reg: regulator at 3 {
+ reg = <3>;
+ regulator-compatible = "ldo1";
+ };
+
+ ldo2_reg: regulator at 4 {
+ reg = <4>;
+ regulator-compatible = "ldo2";
+ };
+
+ ldo3_reg: regulator at 5 {
+ reg = <5>;
+ regulator-compatible = "ldo3";
+ };
+
+ ldo4_reg: regulator at 6 {
+ reg = <6>;
+ regulator-compatible = "ldo4";
+ };
+ };
+};
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 3de30fc..2f942e5 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -18,6 +18,12 @@
#include <configs/ti_am335x_common.h>
+#ifndef CONFIG_SPL_BUILD
+# define CONFIG_OF_CONTROL
+# define CONFIG_OF_SEPARATE
+# define CONFIG_DEFAULT_DEVICE_TREE am335x-boneblack
+#endif
+
#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
--
1.8.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [U-Boot] [PATCH 7/8] RFC: am33xx/omap: Enable FIT support
2013-10-02 14:44 [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
` (5 preceding siblings ...)
2013-10-02 14:44 ` [U-Boot] [PATCH 6/8] RFC: am33xx/omap: Enable CONFIG_OF_CONTROL Simon Glass
@ 2013-10-02 14:44 ` Simon Glass
2013-10-02 14:44 ` [U-Boot] [PATCH 8/8] RFC: am33xx/omap: Enable secure boot with CONFIG_FIT_SIGNATURE Simon Glass
2013-12-06 23:36 ` [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
8 siblings, 0 replies; 18+ messages in thread
From: Simon Glass @ 2013-10-02 14:44 UTC (permalink / raw)
To: u-boot
Enable booting a FIT containing a kernel/device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/am335x_evm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 2f942e5..8ba6301 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -19,6 +19,7 @@
#include <configs/ti_am335x_common.h>
#ifndef CONFIG_SPL_BUILD
+# define CONFIG_FIT
# define CONFIG_OF_CONTROL
# define CONFIG_OF_SEPARATE
# define CONFIG_DEFAULT_DEVICE_TREE am335x-boneblack
--
1.8.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [U-Boot] [PATCH 8/8] RFC: am33xx/omap: Enable secure boot with CONFIG_FIT_SIGNATURE
2013-10-02 14:44 [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
` (6 preceding siblings ...)
2013-10-02 14:44 ` [U-Boot] [PATCH 7/8] RFC: am33xx/omap: Enable FIT support Simon Glass
@ 2013-10-02 14:44 ` Simon Glass
2013-12-06 23:36 ` [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
8 siblings, 0 replies; 18+ messages in thread
From: Simon Glass @ 2013-10-02 14:44 UTC (permalink / raw)
To: u-boot
Enable secure boot functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/am335x_evm.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 8ba6301..1887480 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -20,6 +20,8 @@
#ifndef CONFIG_SPL_BUILD
# define CONFIG_FIT
+# define CONFIG_FIT_SIGNATURE
+# define CONFIG_RSA
# define CONFIG_OF_CONTROL
# define CONFIG_OF_SEPARATE
# define CONFIG_DEFAULT_DEVICE_TREE am335x-boneblack
--
1.8.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black
2013-10-02 14:44 [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
` (7 preceding siblings ...)
2013-10-02 14:44 ` [U-Boot] [PATCH 8/8] RFC: am33xx/omap: Enable secure boot with CONFIG_FIT_SIGNATURE Simon Glass
@ 2013-12-06 23:36 ` Simon Glass
2013-12-20 18:59 ` Tom Rini
2013-12-30 7:40 ` [U-Boot] sandbox question TigerLiu at viatech.com.cn
8 siblings, 2 replies; 18+ messages in thread
From: Simon Glass @ 2013-12-06 23:36 UTC (permalink / raw)
To: u-boot
Hi Tom,
On 2 October 2013 08:44, Simon Glass <sjg@chromium.org> wrote:
> This series adds a few improvements to the image signing feature to
> make it easier to use on the Beaglebone Black.
>
> - Add a DEV_TREE_BIN option to make it easier to include the correct FDT
> (with embedded public keys) into the U-Boot image
> - Enable cache for more TI boards (to speed things up)
> - Increase malloc size
> - Enable CONFIG_OF_CONTROL, FIT and secure boot on am33xx/omap
> (RFC only, not sure we want this, although we could create a separate
> config for it)
>
> I also have a change to adjust mkimage to automatically make space in the
> FDT when adding hashes and signatures. Included here is the ENOSPC patch,
> but the fit_image.c patch will wait until the dumpimage tool is merged,
> since I am changing the same code.
>
> With this, secure boot was tested successfully on Beaglebone Black.
Do you think any of these patches should be applied?
Regards,
Simon
>
>
> Simon Glass (8):
> am33xx/omap: Allow cache enable for all Sitara/OMAP
> hash: Export functions to find and show hash
> fdt: Add DEV_TREE_BIN option to specify a device tree binary file
> fdt: Update functions which write to an FDT to return -ENOSPC
> arm: ti: Increase malloc size to 16MB for armv7 boards
> RFC: am33xx/omap: Enable CONFIG_OF_CONTROL
> RFC: am33xx/omap: Enable FIT support
> RFC: am33xx/omap: Enable secure boot with CONFIG_FIT_SIGNATURE
>
> Makefile | 8 +-
> arch/arm/cpu/armv7/omap-common/Makefile | 4 +
> arch/arm/cpu/armv7/omap-common/hwinit-common.c | 41 --
> arch/arm/cpu/armv7/omap-common/omap-cache.c | 56 +++
> arch/arm/cpu/armv7/omap3/board.c | 8 -
> arch/arm/dts/am33xx.dtsi | 649 +++++++++++++++++++++++++
> arch/arm/dts/dt-bindings/gpio/gpio.h | 15 +
> arch/arm/dts/dt-bindings/pinctrl/am33xx.h | 41 ++
> arch/arm/dts/dt-bindings/pinctrl/omap.h | 54 ++
> board/siemens/common/board.c | 9 -
> board/ti/dts/am335x-bone-common.dtsi | 262 ++++++++++
> board/ti/dts/am335x-boneblack.dts | 17 +
> board/ti/dts/tps65217.dtsi | 56 +++
> common/hash.c | 13 +-
> common/image-fit.c | 4 +-
> doc/README.fdt-control | 16 +-
> include/configs/am335x_evm.h | 9 +
> include/configs/ti_armv7_common.h | 2 +-
> include/hash.h | 22 +
> include/rsa.h | 3 +-
> lib/rsa/rsa-sign.c | 28 +-
> 21 files changed, 1236 insertions(+), 81 deletions(-)
> create mode 100644 arch/arm/cpu/armv7/omap-common/omap-cache.c
> create mode 100644 arch/arm/dts/am33xx.dtsi
> create mode 100644 arch/arm/dts/dt-bindings/gpio/gpio.h
> create mode 100644 arch/arm/dts/dt-bindings/pinctrl/am33xx.h
> create mode 100644 arch/arm/dts/dt-bindings/pinctrl/omap.h
> create mode 100644 board/ti/dts/am335x-bone-common.dtsi
> create mode 100644 board/ti/dts/am335x-boneblack.dts
> create mode 100644 board/ti/dts/tps65217.dtsi
>
> --
> 1.8.4
>
^ permalink raw reply [flat|nested] 18+ messages in thread* [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black
2013-12-06 23:36 ` [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
@ 2013-12-20 18:59 ` Tom Rini
2013-12-26 20:05 ` Simon Glass
2013-12-30 7:40 ` [U-Boot] sandbox question TigerLiu at viatech.com.cn
1 sibling, 1 reply; 18+ messages in thread
From: Tom Rini @ 2013-12-20 18:59 UTC (permalink / raw)
To: u-boot
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
On 12/06/2013 06:36 PM, Simon Glass wrote:
> Hi Tom,
>
> On 2 October 2013 08:44, Simon Glass <sjg@chromium.org> wrote:
>> This series adds a few improvements to the image signing feature to
>> make it easier to use on the Beaglebone Black.
>>
>> - Add a DEV_TREE_BIN option to make it easier to include the correct FDT
>> (with embedded public keys) into the U-Boot image
>> - Enable cache for more TI boards (to speed things up)
>> - Increase malloc size
>> - Enable CONFIG_OF_CONTROL, FIT and secure boot on am33xx/omap
>> (RFC only, not sure we want this, although we could create a separate
>> config for it)
>>
>> I also have a change to adjust mkimage to automatically make space in the
>> FDT when adding hashes and signatures. Included here is the ENOSPC patch,
>> but the fit_image.c patch will wait until the dumpimage tool is merged,
>> since I am changing the same code.
>>
>> With this, secure boot was tested successfully on Beaglebone Black.
>
> Do you think any of these patches should be applied?
Sorry I've taken so long to cycle back on this. At the high level, I'm
OK with it. But we need to make sure we can do these features
optionally, perhaps with a separate build?
- --
Tom
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Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/
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-----END PGP SIGNATURE-----
^ permalink raw reply [flat|nested] 18+ messages in thread
* [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black
2013-12-20 18:59 ` Tom Rini
@ 2013-12-26 20:05 ` Simon Glass
0 siblings, 0 replies; 18+ messages in thread
From: Simon Glass @ 2013-12-26 20:05 UTC (permalink / raw)
To: u-boot
Hi Tom,
On 20 December 2013 11:59, Tom Rini <trini@ti.com> wrote:
> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA1
>
> On 12/06/2013 06:36 PM, Simon Glass wrote:
> > Hi Tom,
> >
> > On 2 October 2013 08:44, Simon Glass <sjg@chromium.org> wrote:
> >> This series adds a few improvements to the image signing feature to
> >> make it easier to use on the Beaglebone Black.
> >>
> >> - Add a DEV_TREE_BIN option to make it easier to include the correct FDT
> >> (with embedded public keys) into the U-Boot image
> >> - Enable cache for more TI boards (to speed things up)
> >> - Increase malloc size
> >> - Enable CONFIG_OF_CONTROL, FIT and secure boot on am33xx/omap
> >> (RFC only, not sure we want this, although we could create a
> separate
> >> config for it)
> >>
> >> I also have a change to adjust mkimage to automatically make space in
> the
> >> FDT when adding hashes and signatures. Included here is the ENOSPC
> patch,
> >> but the fit_image.c patch will wait until the dumpimage tool is merged,
> >> since I am changing the same code.
> >>
> >> With this, secure boot was tested successfully on Beaglebone Black.
> >
> > Do you think any of these patches should be applied?
>
> Sorry I've taken so long to cycle back on this. At the high level, I'm
> OK with it. But we need to make sure we can do these features
> optionally, perhaps with a separate build?
>
Do you think we should apply the ones except for the secure boot stuff
(marked RFC)?
Regards,
Simon
^ permalink raw reply [flat|nested] 18+ messages in thread
* [U-Boot] sandbox question
2013-12-06 23:36 ` [U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black Simon Glass
2013-12-20 18:59 ` Tom Rini
@ 2013-12-30 7:40 ` TigerLiu at viatech.com.cn
2013-12-31 0:42 ` TigerLiu at viatech.com.cn
1 sibling, 1 reply; 18+ messages in thread
From: TigerLiu at viatech.com.cn @ 2013-12-30 7:40 UTC (permalink / raw)
To: u-boot
Hi, Simon:
Sandbox concept is a very good idea to test uboot's non-platform part
code.
I have a question about compiling uboot sandbox branch:
1. It seems sandbox branch could be compiled by gcc compiler on a x86
platform.
Not need to set cross compiler tool chains.
And after finished compiling, it could be run on a x86 environment.
So, my question is:
Arm cross compiler tool chains could produce different obj file for a
same .C file.
The obj file for a same .C file by arm cross compiler tool chain is
not different with the obj file produced by a x86 gcc tool.
(On my x86 platform, defaut gcc is a x86 version)
So, for more precise test for non-platform code:
User should compile sandbox branch with an arm cross compiler tool
chain.
And should run it on an arm linux environment?
Best wishes,
^ permalink raw reply [flat|nested] 18+ messages in thread* [U-Boot] sandbox question
2013-12-30 7:40 ` [U-Boot] sandbox question TigerLiu at viatech.com.cn
@ 2013-12-31 0:42 ` TigerLiu at viatech.com.cn
2014-01-07 23:58 ` Simon Glass
0 siblings, 1 reply; 18+ messages in thread
From: TigerLiu at viatech.com.cn @ 2013-12-31 0:42 UTC (permalink / raw)
To: u-boot
Hi, Simon:
Sorry for some typo.
I re-wrote this mail:
---------------------------------------
I have a question about compiling uboot sandbox branch:
1. It seems sandbox branch could be compiled by gcc compiler on a x86
platform.
Not need to set cross compiler tool chains.
And after finished compiling, it could be run on a x86 environment.
So, my question is:
The obj file for a same .C file by arm cross compiler tool chain is
different with the obj file produced by a x86 gcc tool.
(On my x86 platform, defaut gcc is a x86 version)
So, for more precise test for non-platform code:
User should compile sandbox branch with an arm cross compiler tool
chain.
And should run it on an arm linux environment?
Best wishes,
^ permalink raw reply [flat|nested] 18+ messages in thread* [U-Boot] sandbox question
2013-12-31 0:42 ` TigerLiu at viatech.com.cn
@ 2014-01-07 23:58 ` Simon Glass
2014-01-08 0:52 ` TigerLiu at viatech.com.cn
0 siblings, 1 reply; 18+ messages in thread
From: Simon Glass @ 2014-01-07 23:58 UTC (permalink / raw)
To: u-boot
Hi Tiger,
On 30 December 2013 17:42, <TigerLiu@viatech.com.cn> wrote:
> Hi, Simon:
> Sorry for some typo.
> I re-wrote this mail:
>
I've been away, sorry for the delay.
> ---------------------------------------
> I have a question about compiling uboot sandbox branch:
> 1. It seems sandbox branch could be compiled by gcc compiler on a x86
> platform.
> Not need to set cross compiler tool chains.
> And after finished compiling, it could be run on a x86 environment.
> So, my question is:
> The obj file for a same .C file by arm cross compiler tool chain is
> different with the obj file produced by a x86 gcc tool.
> (On my x86 platform, defaut gcc is a x86 version)
>
> So, for more precise test for non-platform code:
> User should compile sandbox branch with an arm cross compiler tool
> chain.
> And should run it on an arm linux environment?
>
Well you could, but what benefit would that provide? It would not use any
code from arch/arm if that is what you are thinking. Sandbox is its own
'architecture'?
Regards,
Simon
>
> Best wishes,
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [U-Boot] sandbox question
2014-01-07 23:58 ` Simon Glass
@ 2014-01-08 0:52 ` TigerLiu at viatech.com.cn
2014-01-08 3:46 ` Abraham Varricatt
0 siblings, 1 reply; 18+ messages in thread
From: TigerLiu at viatech.com.cn @ 2014-01-08 0:52 UTC (permalink / raw)
To: u-boot
Hi, Simon:
Thanks for your reply!
>Well you could, but what benefit would that provide? It would not use
any code from arch/arm if that is what you are thinking. Sandbox is its
own >'architecture'?
For example:
1. i want to test fs/ext4 driver.
They are architecture independent code.
I means:
(1) the obj files produced by arm gcc compiler are different with obj
files produced by x86 gcc compiler.
Maybe arm gcc compiler would introduce some arm architecture
related optimizations for fs/ext4 drivers.
Maybe x86 gcc compiler would introduce some x86 architecture
related optimizations for fs/ext4 drivers.
So, if sandbox's fs/ext4 drivers' test passed on an x86
platform,but these architecture related optimizations would cause
some potential bugs on ARM platform.
Is it a problem?
Best wishes,
^ permalink raw reply [flat|nested] 18+ messages in thread* [U-Boot] sandbox question
2014-01-08 0:52 ` TigerLiu at viatech.com.cn
@ 2014-01-08 3:46 ` Abraham Varricatt
2014-01-08 10:30 ` TigerLiu at viatech.com.cn
0 siblings, 1 reply; 18+ messages in thread
From: Abraham Varricatt @ 2014-01-08 3:46 UTC (permalink / raw)
To: u-boot
Hello Tiger,
On Wed, Jan 8, 2014 at 6:22 AM, <TigerLiu@viatech.com.cn> wrote:
> Hi, Simon:
>
> Thanks for your reply!
>
>>Well you could, but what benefit would that provide? It would not use
> any code from arch/arm if that is what you are thinking. Sandbox is its
> own >'architecture'?
Your question seems a bit odd to me. My understanding of the sandbox
feature, is to let someone play around with u-boot from an
architecture independent perspective. Theoretically, this means that
you should be able to cross-compile the sandbox application as an ARM
executable and run it anywhere ... like on the Raspberry Pi (ARMv7, I
think). Or you could just compile it and run on a standard x86 system.
Obviously, the binary images produced for both architectures will be
different, but the code should work the same. And naturally, running
the application on an x86 system working at 2Ghz will be different
from running it on an ARM system working at 700Mhz. The whole point of
calling the code "architecture independent" is that it will work
across all systems.
> So, if sandbox's fs/ext4 drivers' test passed on an x86
> platform,but these architecture related optimizations would cause
>
> some potential bugs on ARM platform.
>
If you really do find an odd bug where it does not work as expected
(it can happen), then that's an exceptional case which should be
investigated further. I'm not sure if investigating it in sandbox mode
will help.
-Abraham V.
^ permalink raw reply [flat|nested] 18+ messages in thread