From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Mon, 13 Jan 2014 23:15:48 +0100 Subject: [U-Boot] [PATCH 2/2] mx1ads: remove board support In-Reply-To: <1389643577-21021-2-git-send-email-albert.u.boot@aribaud.net> References: <1389643577-21021-1-git-send-email-albert.u.boot@aribaud.net> <1389643577-21021-2-git-send-email-albert.u.boot@aribaud.net> Message-ID: <52D46594.3080508@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 13/01/2014 21:06, Albert ARIBAUD wrote: > Signed-off-by: Albert ARIBAUD > --- > board/mx1ads/Makefile | 16 --- > board/mx1ads/lowlevel_init.S | 68 ---------- > board/mx1ads/mx1ads.c | 178 ------------------------- > board/mx1ads/syncflash.c | 307 ------------------------------------------- > boards.cfg | 1 - > doc/README.scrapyard | 1 + > include/configs/mx1ads.h | 163 ----------------------- > 7 files changed, 1 insertion(+), 733 deletions(-) > delete mode 100644 board/mx1ads/Makefile > delete mode 100644 board/mx1ads/lowlevel_init.S > delete mode 100644 board/mx1ads/mx1ads.c > delete mode 100644 board/mx1ads/syncflash.c > delete mode 100644 include/configs/mx1ads.h > > diff --git a/board/mx1ads/Makefile b/board/mx1ads/Makefile > deleted file mode 100644 > index 6dfd18e..0000000 > --- a/board/mx1ads/Makefile > +++ /dev/null > @@ -1,16 +0,0 @@ > -# > -# board/mx1ads/Makefile > -# > -# (C) Copyright 2006 > -# Wolfgang Denk, DENX Software Engineering, wd at denx.de. > -# > -# (c) Copyright 2004 > -# Techware Information Technology, Inc. > -# http://www.techware.com.tw/ > -# > -# Ming-Len Wu > -# > -# SPDX-License-Identifier: GPL-2.0+ > - > -obj-y := mx1ads.o syncflash.o > -obj-y += lowlevel_init.o > diff --git a/board/mx1ads/lowlevel_init.S b/board/mx1ads/lowlevel_init.S > deleted file mode 100644 > index d1e472a..0000000 > --- a/board/mx1ads/lowlevel_init.S > +++ /dev/null > @@ -1,68 +0,0 @@ > -/* > - * board/mx1ads/lowlevel_init.S > - * > - * (c) Copyright 2004 > - * Techware Information Technology, Inc. > - * http://www.techware.com.tw/ > - * > - * Ming-Len Wu > - * > - * SPDX-License-Identifier: GPL-2.0+ > - */ > - > -#include > -#include > - > -#define SDCTL0 0x221000 > -#define SDCTL1 0x221004 > - > - > -_TEXT_BASE: > - .word CONFIG_SYS_TEXT_BASE > - > -.globl lowlevel_init > -lowlevel_init: > -/* memory controller init */ > - > - ldr r1, =SDCTL0 > - > -/* Set Precharge Command */ > - > - ldr r3, =0x92120200 > -/* ldr r3, =0x92120251 > -*/ > - str r3, [r1] > - > -/* Issue Precharge All Commad */ > - ldr r3, =0x8200000 > - ldr r2, [r3] > - > -/* Set AutoRefresh Command */ > - ldr r3, =0xA2120200 > - str r3, [r1] > - > -/* Issue AutoRefresh Command */ > - ldr r3, =0x8000000 > - ldr r2, [r3] > - ldr r2, [r3] > - ldr r2, [r3] > - ldr r2, [r3] > - ldr r2, [r3] > - ldr r2, [r3] > - ldr r2, [r3] > - ldr r2, [r3] > - > -/* Set Mode Register */ > - ldr r3, =0xB2120200 > - str r3, [r1] > - > -/* Issue Mode Register Command */ > - ldr r3, =0x08111800 /* Mode Register Value */ > - ldr r2, [r3] > - > -/* Set Normal Mode */ > - ldr r3, =0x82124200 > - str r3, [r1] > - > -/* everything is fine now */ > - mov pc, lr > diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c > deleted file mode 100644 > index 4266048..0000000 > --- a/board/mx1ads/mx1ads.c > +++ /dev/null > @@ -1,178 +0,0 @@ > -/* > - * board/mx1ads/mx1ads.c > - * > - * (c) Copyright 2004 > - * Techware Information Technology, Inc. > - * http://www.techware.com.tw/ > - * > - * Ming-Len Wu > - * > - * SPDX-License-Identifier: GPL-2.0+ > - */ > - > -#include > -#include > -/*#include */ > -#include > -#include > - > -DECLARE_GLOBAL_DATA_PTR; > - > -#define FCLK_SPEED 1 > - > -#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */ > -#define M_MDIV 0xC3 > -#define M_PDIV 0x4 > -#define M_SDIV 0x1 > -#elif FCLK_SPEED==1 /* Fout = 202.8MHz */ > -#define M_MDIV 0xA1 > -#define M_PDIV 0x3 > -#define M_SDIV 0x1 > -#endif > - > -#define USB_CLOCK 1 > - > -#if USB_CLOCK==0 > -#define U_M_MDIV 0xA1 > -#define U_M_PDIV 0x3 > -#define U_M_SDIV 0x1 > -#elif USB_CLOCK==1 > -#define U_M_MDIV 0x48 > -#define U_M_PDIV 0x3 > -#define U_M_SDIV 0x2 > -#endif > - > -#if 0 > - > -static inline void delay (unsigned long loops) > -{ > - __asm__ volatile ("1:\n" > - "subs %0, %1, #1\n" > - "bne 1b":"=r" (loops):"0" (loops)); > -} > - > -#endif > - > -/* > - * Miscellaneous platform dependent initialisations > - */ > - > -void SetAsynchMode (void) > -{ > - __asm__ ("mrc p15,0,r0,c1,c0,0 \n" > - "mov r2, #0xC0000000 \n" > - "orr r0,r2,r0 \n" "mcr p15,0,r0,c1,c0,0 \n"); > -} > - > -static u32 mc9328sid; > - > -int board_early_init_f(void) > -{ > - mc9328sid = SIDR; > - > - GPCR = 0x000003AB; /* I/O pad driving strength */ > - > - /* MX1_CS1U = 0x00000A00; */ /* SRAM initialization */ > -/* MX1_CS1L = 0x11110601; */ > - > - MPCTL0 = 0x04632410; /* setting for 150 MHz MCU PLL CLK */ > - > -/* set FCLK divider 1 (i.e. FCLK to MCU PLL CLK) and > - * BCLK divider to 2 (i.e. BCLK to 48 MHz) > - */ > - CSCR = 0xAF000403; > - > - CSCR |= 0x00200000; /* Trigger the restart bit(bit 21) */ > - CSCR &= 0xFFFF7FFF; /* Program PRESC bit(bit 15) to 0 to divide-by-1 */ > - > -/* setup cs4 for cs8900 ethernet */ > - > - CS4U = 0x00000F00; /* Initialize CS4 for CS8900 ethernet */ > - CS4L = 0x00001501; > - > - GIUS (0) &= 0xFF3FFFFF; > - GPR (0) &= 0xFF3FFFFF; > - > - readl(0x1500000C); > - readl(0x1500000C); > - > - SetAsynchMode (); > - > - icache_enable (); > - dcache_enable (); > - > -/* set PERCLKs */ > - PCDR = 0x00000055; /* set PERCLKS */ > - > -/* PERCLK3 is only used by SSI so the SSI driver can set it any value it likes > - * PERCLK1 and PERCLK2 are shared so DO NOT change it in any other place > - * all sources selected as normal interrupt > - */ > - > -/* MX1_INTTYPEH = 0; > - MX1_INTTYPEL = 0; > -*/ > - return 0; > -} > - > -int board_init(void) > -{ > - gd->bd->bi_arch_number = MACH_TYPE_MX1ADS; > - > - gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */ > - > - return 0; > -} > - > -int board_late_init (void) > -{ > - > - setenv ("stdout", "serial"); > - setenv ("stderr", "serial"); > - > - switch (mc9328sid) { > - case 0x0005901d: > - printf ("MX1ADS board with MC9328 MX1 (0L44N), Silicon ID 0x%08x \n\n", > - mc9328sid); > - break; > - case 0x04d4c01d: > - printf ("MX1ADS board with MC9328 MXL (1L45N), Silicon ID 0x%08x \n\n", > - mc9328sid); > - break; > - case 0x00d4c01d: > - printf ("MX1ADS board with MC9328 MXL (2L45N), Silicon ID 0x%08x \n\n", > - mc9328sid); > - break; > - > - default: > - printf ("MX1ADS board with UNKNOWN MC9328 cpu, Silicon ID 0x%08x \n", > - mc9328sid); > - break; > - } > - return 0; > -} > - > -int dram_init(void) > -{ > - /* dram_init must store complete ramsize in gd->ram_size */ > - gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, > - PHYS_SDRAM_1_SIZE); > - return 0; > -} > - > -void dram_init_banksize(void) > -{ > - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; > - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; > -} > - > -#ifdef CONFIG_CMD_NET > -int board_eth_init(bd_t *bis) > -{ > - int rc = 0; > -#ifdef CONFIG_CS8900 > - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); > -#endif > - return rc; > -} > -#endif > diff --git a/board/mx1ads/syncflash.c b/board/mx1ads/syncflash.c > deleted file mode 100644 > index 5d68533..0000000 > --- a/board/mx1ads/syncflash.c > +++ /dev/null > @@ -1,307 +0,0 @@ > -/* > - * board/mx1ads/syncflash.c > - * > - * (c) Copyright 2004 > - * Techware Information Technology, Inc. > - * http://www.techware.com.tw/ > - * > - * Ming-Len Wu > - * > - * SPDX-License-Identifier: GPL-2.0+ > - */ > - > -#include > -/*#include */ > -#include > - > -typedef unsigned long * p_u32; > - > -/* 4Mx16x2 IAM=0 CSD1 */ > - > -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ > - > -/* Following Setting is for CSD1 */ > -#define SFCTL 0x00221004 > -#define reg_SFCTL __REG(SFCTL) > - > -#define SYNCFLASH_A10 (0x00100000) > - > -#define CMD_NORMAL (0x81020300) /* Normal Mode */ > -#define CMD_PREC (CMD_NORMAL + 0x10000000) /* Precharge Command */ > -#define CMD_AUTO (CMD_NORMAL + 0x20000000) /* Auto Refresh Command */ > -#define CMD_LMR (CMD_NORMAL + 0x30000000) /* Load Mode Register Command */ > -#define CMD_LCR (CMD_NORMAL + 0x60000000) /* LCR Command */ > -#define CMD_PROGRAM (CMD_NORMAL + 0x70000000) > - > -#define MODE_REG_VAL (CONFIG_SYS_FLASH_BASE+0x0008CC00) /* Cas Latency 3 */ > - > -/* LCR Command */ > -#define LCR_READSTATUS (0x0001C000) /* 0x70 */ > -#define LCR_ERASE_CONFIRM (0x00008000) /* 0x20 */ > -#define LCR_ERASE_NVMODE (0x0000C000) /* 0x30 */ > -#define LCR_PROG_NVMODE (0x00028000) /* 0xA0 */ > -#define LCR_SR_CLEAR (0x00014000) /* 0x50 */ > - > -/* Get Status register */ > -u32 SF_SR(void) { > - u32 tmp; > - > - reg_SFCTL = CMD_PROGRAM; > - tmp = __REG(CONFIG_SYS_FLASH_BASE); > - > - reg_SFCTL = CMD_NORMAL; > - > - reg_SFCTL = CMD_LCR; /* Activate LCR Mode */ > - __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR); > - > - return tmp; > -} > - > -/* check if SyncFlash is ready */ > -u8 SF_Ready(void) { > - u32 tmp; > - > - tmp = SF_SR(); > - > - if ((tmp & 0x00800000) && (tmp & 0x001C0000)) { > - printf ("SyncFlash Error code %08x\n",tmp); > - }; > - > - if ((tmp & 0x00000080) && (tmp & 0x0000001C)) { > - printf ("SyncFlash Error code %08x\n",tmp); > - }; > - > - if (tmp == 0x00800080) /* Test Bit 7 of SR */ > - return 1; > - else > - return 0; > -} > - > -/* Issue the precharge all command */ > -void SF_PrechargeAll(void) { > - > - /* Set Precharge Command */ > - reg_SFCTL = CMD_PREC; > - /* Issue Precharge All Command */ > - __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10); > -} > - > -/* set SyncFlash to normal mode */ > -void SF_Normal(void) { > - > - SF_PrechargeAll(); > - > - reg_SFCTL = CMD_NORMAL; > -} > - > -/* Erase SyncFlash */ > -void SF_Erase(u32 RowAddress) { > - > - reg_SFCTL = CMD_NORMAL; > - __REG(RowAddress); > - > - reg_SFCTL = CMD_PREC; > - __REG(RowAddress); > - > - reg_SFCTL = CMD_LCR; /* Set LCR mode */ > - __REG(RowAddress + LCR_ERASE_CONFIRM) = 0; /* Issue Erase Setup Command */ > - > - reg_SFCTL = CMD_NORMAL; /* return to Normal mode */ > - __REG(RowAddress) = 0xD0D0D0D0; /* Confirm */ > - > - while(!SF_Ready()); > -} > - > -void SF_NvmodeErase(void) { > - SF_PrechargeAll(); > - > - reg_SFCTL = CMD_LCR; /* Set to LCR mode */ > - __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0; /* Issue Erase Nvmode Reg Command */ > - > - reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */ > - __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0xC0C0C0C0; /* Confirm */ > - > - while(!SF_Ready()); > -} > - > -void SF_NvmodeWrite(void) { > - SF_PrechargeAll(); > - > - reg_SFCTL = CMD_LCR; /* Set to LCR mode */ > - __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0; /* Issue Program Nvmode reg command */ > - > - reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */ > - __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0xC0C0C0C0; /* Confirm not needed */ > -} > - > -/****************************************************************************************/ > - > -ulong flash_init(void) { > - int i, j; > - > -/* Turn on CSD1 for negating RESETSF of SyncFLash */ > - > - reg_SFCTL |= 0x80000000; /* enable CSD1 for SyncFlash */ > - udelay(200); > - > - reg_SFCTL = CMD_LMR; /* Set Load Mode Register Command */ > - __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */ > - > - SF_Normal(); > - > - i = 0; > - > - flash_info[i].flash_id = FLASH_MAN_MT | FLASH_MT28S4M16LC; > - > - flash_info[i].size = FLASH_BANK_SIZE; > - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; > - > - memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); > - > - for (j = 0; j < flash_info[i].sector_count; j++) { > - flash_info[i].start[j] = CONFIG_SYS_FLASH_BASE + j * 0x00100000; > - } > - > - flash_protect(FLAG_PROTECT_SET, > - CONFIG_SYS_FLASH_BASE, > - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, > - &flash_info[0]); > - > - flash_protect(FLAG_PROTECT_SET, > - CONFIG_ENV_ADDR, > - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, > - &flash_info[0]); > - > - return FLASH_BANK_SIZE; > -} > - > -void flash_print_info (flash_info_t *info) { > - > - int i; > - > - switch (info->flash_id & FLASH_VENDMASK) { > - case (FLASH_MAN_MT & FLASH_VENDMASK): > - printf("Micron: "); > - break; > - default: > - printf("Unknown Vendor "); > - break; > - } > - > - switch (info->flash_id & FLASH_TYPEMASK) { > - case (FLASH_MT28S4M16LC & FLASH_TYPEMASK): > - printf("2x FLASH_MT28S4M16LC (16MB Total)\n"); > - break; > - default: > - printf("Unknown Chip Type\n"); > - return; > - break; > - } > - > - printf(" Size: %ld MB in %d Sectors\n", > - info->size >> 20, info->sector_count); > - > - printf(" Sector Start Addresses: "); > - > - for (i = 0; i < info->sector_count; i++) { > - if ((i % 5) == 0) > - printf ("\n "); > - > - printf (" %08lX%s", info->start[i], > - info->protect[i] ? " (RO)" : " "); > - } > - > - printf ("\n"); > -} > - > -/*-----------------------------------------------------------------------*/ > - > -int flash_erase (flash_info_t *info, int s_first, int s_last) { > - int iflag, cflag, prot, sect; > - int rc = ERR_OK; > - > -/* first look for protection bits */ > - > - if (info->flash_id == FLASH_UNKNOWN) > - return ERR_UNKNOWN_FLASH_TYPE; > - > - if ((s_first < 0) || (s_first > s_last)) > - return ERR_INVAL; > - > - if ((info->flash_id & FLASH_VENDMASK) != (FLASH_MAN_MT & FLASH_VENDMASK)) > - return ERR_UNKNOWN_FLASH_VENDOR; > - > - prot = 0; > - > - for (sect = s_first; sect <= s_last; ++sect) { > - if (info->protect[sect]) > - prot++; > - } > - > - if (prot) { > - printf("protected!\n"); > - return ERR_PROTECTED; > - } > -/* > - * Disable interrupts which might cause a timeout > - * here. Remember that our exception vectors are > - * at address 0 in the flash, and we don't want a > - * (ticker) exception to happen while the flash > - * chip is in programming mode. > - */ > - > - cflag = icache_status(); > - icache_disable(); > - iflag = disable_interrupts(); > - > -/* Start erase on unprotected sectors */ > - for (sect = s_first; sect <= s_last && !ctrlc(); sect++) { > - > - printf("Erasing sector %2d ... ", sect); > - > -/* arm simple, non interrupt dependent timer */ > - > - get_timer(0); > - > - SF_NvmodeErase(); > - SF_NvmodeWrite(); > - > - SF_Erase(CONFIG_SYS_FLASH_BASE + (0x0100000 * sect)); > - SF_Normal(); > - > - printf("ok.\n"); > - } > - > - if (ctrlc()) > - printf("User Interrupt!\n"); > - > - if (iflag) > - enable_interrupts(); > - > - if (cflag) > - icache_enable(); > - > - return rc; > -} > - > -/*----------------------------------------------------------------------- > - * Copy memory to flash. > - */ > - > -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { > - int i; > - > - for(i = 0; i < cnt; i += 4) { > - > - SF_PrechargeAll(); > - > - reg_SFCTL = CMD_PROGRAM; /* Enter SyncFlash Program mode */ > - __REG(addr + i) = __REG((u32)src + i); > - > - while(!SF_Ready()); > - } > - > - SF_Normal(); > - > - return ERR_OK; > -} > diff --git a/boards.cfg b/boards.cfg > index af73934..928e222 100644 > --- a/boards.cfg > +++ b/boards.cfg > @@ -65,7 +65,6 @@ Active arm arm920t at91 BuS eb_cpux9k2 > Active arm arm920t at91 BuS eb_cpux9k2 eb_cpux9k2_ram eb_cpux9k2:RAMBOOT Jens Scharsig > Active arm arm920t at91 eukrea cpuat91 cpuat91 cpuat91 Eric Benard > Active arm arm920t at91 eukrea cpuat91 cpuat91_ram cpuat91:RAMBOOT Eric Benard > -Active arm arm920t imx - - mx1ads - - > Active arm arm920t imx - - scb9328 - Torsten Koschorrek > Active arm arm920t ks8695 - - cm4008 - Greg Ungerer > Active arm arm920t ks8695 - - cm41xx - - > diff --git a/doc/README.scrapyard b/doc/README.scrapyard > index be3e97e..2aed855 100644 > --- a/doc/README.scrapyard > +++ b/doc/README.scrapyard > @@ -11,6 +11,7 @@ easily if here is something they might want to dig for... > > Board Arch CPU Commit Removed Last known maintainer/contact > ================================================================================================= > +mx1ads arm arm920t - 2014-01-13 > mini2440 arm arm920t - 2014-01-13 Gabriel Huau > omap730p2 arm arm926ejs 79c5c08d 2013-11-11 > pn62 powerpc mpc824x 649acfe1 2013-11-11 Wolfgang Grandegger > diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h > deleted file mode 100644 > index 12667c5..0000000 > --- a/include/configs/mx1ads.h > +++ /dev/null > @@ -1,163 +0,0 @@ > -/* > - * include/configs/mx1ads.h > - * > - * (c) Copyright 2004 > - * Techware Information Technology, Inc. > - * http://www.techware.com.tw/ > - * > - * Ming-Len Wu > - * > - * This is the Configuration setting for Motorola MX1ADS board > - * > - * SPDX-License-Identifier: GPL-2.0+ > - */ > - > -#ifndef __CONFIG_H > -#define __CONFIG_H > - > -/* > - * High Level Configuration Options > - * (easy to change) > - */ > -#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ > -#define CONFIG_IMX 1 /* It's a Motorola MC9328 SoC */ > -#define CONFIG_MX1ADS 1 /* on a Motorola MX1ADS Board */ > - > -/* > - * Select serial console configuration > - */ > -#define CONFIG_IMX_SERIAL > -#define CONFIG_IMX_SERIAL1 /* internal uart 1 */ > -/* #define _CONFIG_UART2 */ /* internal uart 2 */ > -/* #define CONFIG_SILENT_CONSOLE */ /* use this to disable output */ > - > -#define CONFIG_BOARD_LATE_INIT > -#define USE_920T_MMU 1 > - > -#if 0 > -#define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ > -#define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ > -#define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ > -#endif > - > -/* > - * Size of malloc() pool > - */ > - > -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) > - > -/* > - * CS8900 Ethernet drivers > - */ > -#define CONFIG_CS8900 /* we have a CS8900 on-board */ > -#define CONFIG_CS8900_BASE 0x15000300 > -#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ > - > -/* > - * select serial console configuration > - */ > - > -/* #define CONFIG_UART1 */ > -/* #define CONFIG_UART2 1 */ > - > -#define CONFIG_BAUDRATE 115200 > - > -/* > - * BOOTP options > - */ > -#define CONFIG_BOOTP_BOOTFILESIZE > -#define CONFIG_BOOTP_BOOTPATH > -#define CONFIG_BOOTP_GATEWAY > -#define CONFIG_BOOTP_HOSTNAME > - > -/* > - * Command line configuration. > - */ > -#include > - > -#define CONFIG_CMD_CACHE > -#define CONFIG_CMD_REGINFO > -#define CONFIG_CMD_ELF > - > -#define CONFIG_BOOTDELAY 3 > -#define CONFIG_BOOTARGS "root=/dev/msdk mem=48M" > -#define CONFIG_BOOTFILE "mx1ads" > -#define CONFIG_BOOTCOMMAND "tftp; bootm" > - > -#if defined(CONFIG_CMD_KGDB) > -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ > -#endif > - > -/* > - * Miscellaneous configurable options > - */ > - > -#define CONFIG_SYS_HUSH_PARSER 1 > - > -#define CONFIG_SYS_LONGHELP /* undef to save memory */ > - > -#ifdef CONFIG_SYS_HUSH_PARSER > -#define CONFIG_SYS_PROMPT "MX1ADS$ " /* Monitor Command Prompt */ > -#else > -#define CONFIG_SYS_PROMPT "MX1ADS=> " /* Monitor Command Prompt */ > -#endif > - > -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ > -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) > - /* Print Buffer Size */ > -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ > -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ > - > -#define CONFIG_SYS_MEMTEST_START 0x09000000 /* memtest works on */ > -#define CONFIG_SYS_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */ > - > -#define CONFIG_SYS_LOAD_ADDR 0x08800000 /* default load address */ > -#define CONFIG_SYS_HZ 3686400 > -#define CONFIG_SYS_CPUSPEED 0x141 > - > -/*----------------------------------------------------------------------- > - * Physical Memory Map > - */ > - > -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */ > -#define PHYS_SDRAM_1 0x08000000 /* SDRAM on CSD0 */ > -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ > - > -#define CONFIG_SYS_TEXT_BASE 0x10000000 > - > -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 > -#define CONFIG_SYS_INIT_RAM_ADDR 0x00300000 > -#define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF > -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ > - GENERATED_GBL_DATA_SIZE) > -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ > - CONFIG_SYS_GBL_DATA_OFFSET) > - > -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* 1 bank of SyncFlash */ > -#define CONFIG_SYS_FLASH_BASE 0x0C000000 /* SyncFlash on CSD1 */ > -#define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */ > - > -/*----------------------------------------------------------------------- > - * FLASH and environment organization > - */ > - > -#define CONFIG_SYNCFLASH 1 > -#define PHYS_FLASH_SIZE 0x01000000 > -#define CONFIG_SYS_MAX_FLASH_SECT (16) > -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+0x00ff8000) > - > -#define CONFIG_ENV_IS_IN_FLASH 1 > -#define CONFIG_ENV_SIZE 0x04000 /* Total Size of Environment Sector */ > -#define CONFIG_ENV_SECT_SIZE 0x100000 > - > -/*----------------------------------------------------------------------- > - * Enable passing ATAGS > - */ > - > -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ > -#define CONFIG_SETUP_MEMORY_TAGS 1 > - > -#define CONFIG_SYS_CLK_FREQ 16780000 > -#define CONFIG_SYSPLL_CLK_FREQ 16000000 > - > -#endif /* __CONFIG_H */ > Acked-by: Stefano Babic Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================