From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Tue, 21 Jan 2014 15:01:05 -0800
Subject: [U-Boot] [PATCH v3] t2080qds/ddr: update ddr parameters
In-Reply-To: <1389589266-568-1-git-send-email-Shengzhou.Liu@freescale.com>
References: <1389589266-568-1-git-send-email-Shengzhou.Liu@freescale.com>
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On 01/12/2014 09:01 PM, Shengzhou Liu wrote:
> - Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
> - Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
>   unrelated to DDR3/3L.
> 
> Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s.
> 
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> ---
> v3: fix issue of two line with same parameters and add more commit description.
> v2: rebase.

Applied to u-boot-mpc85xx master branch. Awaiting upstream.

York