[U-Boot] [PATCH 1/3 V3] esdhc: Workaround for card can't be detected on T4240QDS

[U-Boot] [PATCH 1/3 V3] esdhc: Workaround for card can't be detected on T4240QDS

[Haijun Zhang]

Card detection pin is ineffective on T4240QDS Rev1.0.
There are two cards can be connected to board.
1. eMMC card is built-in board, can not be removed. so
   For eMMC card it is always there.
2. Card detecting pin is functional for SDHC card in Rev2.0.

This workaround force sdhc driver scan and initialize the card
regardless of whether the card is inserted or not in case Rev1.0.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
---
changes for V3:
	- Define quirk in board specific file instead of code in driver
changes for V2:
	- Add the judgement condition for this broken card

 drivers/mmc/fsl_esdhc.c    | 4 ++++
 include/configs/T4240QDS.h | 5 +++++
 2 files changed, 9 insertions(+)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index e522a70..2ee93cd 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -548,6 +548,10 @@ static int esdhc_getcd(struct mmc *mmc)
 	struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
 	int timeout = 1000;
 
+#ifdef CONFIG_ESDHC_DETECT_QUIRK
+	if (CONFIG_ESDHC_DETECT_QUIRK)
+		return 1;
+#endif
 	while (!(esdhc_read32(&regs->prsstat) & PRSSTAT_CINS) && --timeout)
 		udelay(1000);
 
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index c96df54..0e0b346 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -165,6 +165,8 @@ unsigned long get_board_ddr_clk(void);
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20
 #define QIXIS_RCFG_CTL_RECONFIG_START	0x21
 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
+#define QIXIS_BRDCFG5			0x55
+#define QIXIS_MUX_SDHC			2
 #define QIXIS_BASE_PHYS		(0xf00000000ull | QIXIS_BASE)
 
 #define CONFIG_SYS_CSPR3_EXT	(0xf)
@@ -466,6 +468,9 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
+#define CONFIG_ESDHC_DETECT_QUIRK \
+	(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \
+	IS_SVR_REV(get_svr(), 1, 0))
 #endif
 
 #define CONFIG_BOOTDELAY	10	/* -1 disables auto-boot */
-- 
1.8.4.1

[U-Boot] [PATCH 2/3 V3] esdhc: Detecting 8 bit width before mmc initialization

[Haijun Zhang]

The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
---
changes for V3:
        - Define quirk in board specific file instead of code in driver
changes for V2:
	- No changes

 drivers/mmc/fsl_esdhc.c    | 5 +++++
 include/configs/T4240QDS.h | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 2ee93cd..72ca109 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -644,6 +644,11 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 	if (caps & ESDHC_HOSTCAPBLT_HSS)
 		mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
+#ifdef CONFIG_ESDHC_DETECT_8_BIT_QUIRK
+	if (CONFIG_ESDHC_DETECT_8_BIT_QUIRK)
+		mmc->host_caps &= ~MMC_MODE_8BIT;
+#endif
+
 	mmc->f_min = 400000;
 	mmc->f_max = MIN(gd->arch.sdhc_clk, 52000000);
 
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index 0e0b346..275a7a8 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -167,6 +167,7 @@ unsigned long get_board_ddr_clk(void);
 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
 #define QIXIS_BRDCFG5			0x55
 #define QIXIS_MUX_SDHC			2
+#define QIXIS_MUX_SDHC_WIDTH8		1
 #define QIXIS_BASE_PHYS		(0xf00000000ull | QIXIS_BASE)
 
 #define CONFIG_SYS_CSPR3_EXT	(0xf)
@@ -471,6 +472,8 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ESDHC_DETECT_QUIRK \
 	(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \
 	IS_SVR_REV(get_svr(), 1, 0))
+#define CONFIG_ESDHC_DETECT_8_BIT_QUIRK \
+	(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC_WIDTH8))
 #endif
 
 #define CONFIG_BOOTDELAY	10	/* -1 disables auto-boot */
-- 
1.8.4.1

[U-Boot] [PATCH 2/3 V3] esdhc: Detecting 8 bit width before mmc initialization

[Pantelis Antoniou]

Hi Haijun,

On Jan 10, 2014, at 7:52 AM, Haijun Zhang wrote:

> The upper 4 data signals of esdhc are shared with spi flash.
> So detect if the upper 4 pins are assigned to esdhc before
> enable sdhc 8 bit width.
> 
> Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
> ---
> changes for V3:
>        - Define quirk in board specific file instead of code in driver
> changes for V2:
> 	- No changes
> 
> drivers/mmc/fsl_esdhc.c    | 5 +++++
> include/configs/T4240QDS.h | 3 +++
> 2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index 2ee93cd..72ca109 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -644,6 +644,11 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
> 	if (caps & ESDHC_HOSTCAPBLT_HSS)
> 		mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
> 
> +#ifdef CONFIG_ESDHC_DETECT_8_BIT_QUIRK
> +	if (CONFIG_ESDHC_DETECT_8_BIT_QUIRK)
> +		mmc->host_caps &= ~MMC_MODE_8BIT;
> +#endif
> +
> 	mmc->f_min = 400000;
> 	mmc->f_max = MIN(gd->arch.sdhc_clk, 52000000);
> 
> diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
> index 0e0b346..275a7a8 100644
> --- a/include/configs/T4240QDS.h
> +++ b/include/configs/T4240QDS.h
> @@ -167,6 +167,7 @@ unsigned long get_board_ddr_clk(void);
> #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
> #define QIXIS_BRDCFG5			0x55
> #define QIXIS_MUX_SDHC			2
> +#define QIXIS_MUX_SDHC_WIDTH8		1
> #define QIXIS_BASE_PHYS		(0xf00000000ull | QIXIS_BASE)
> 
> #define CONFIG_SYS_CSPR3_EXT	(0xf)
> @@ -471,6 +472,8 @@ unsigned long get_board_ddr_clk(void);
> #define CONFIG_ESDHC_DETECT_QUIRK \
> 	(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \
> 	IS_SVR_REV(get_svr(), 1, 0))
> +#define CONFIG_ESDHC_DETECT_8_BIT_QUIRK \
> +	(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC_WIDTH8))
> #endif
> 
> #define CONFIG_BOOTDELAY	10	/* -1 disables auto-boot */
> -- 
> 1.8.4.1
> 
> 

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

[U-Boot] [PATCH 3/3 V3] eSDHC: Calculate envaddr accroding to the address format

[Haijun Zhang]

On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the
32-bit source address specifies the memory address in block address
format. Block length is fixed to 512 bytes as per the SD High Capacity
specification. So we need to convert the block address format
to byte address format to calculate the envaddr.

If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
---
changes for V3:
        - Define quirk in SOC specific file instead of code in driver
changes for V2:
	- Use 0xffffffffu instead of UINT_MAX

 arch/powerpc/include/asm/config_mpc85xx.h |  3 +++
 board/freescale/common/sdhc_boot.c        | 29 +++++++++++++++++++++++++++++
 2 files changed, 32 insertions(+)

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 15affdc..e8bd76a 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -152,6 +152,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 #define CONFIG_SYS_FSL_A004447_SVR_REV	0x10
+#define CONFIG_ESDHC_HC_BLK_ADDR
 
 /* P1011 is single core version of P1020 */
 #elif defined(CONFIG_P1011)
@@ -552,6 +553,7 @@
 #define CONFIG_NAND_FSL_IFC
 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_A005125
+#define CONFIG_ESDHC_HC_BLK_ADDR
 
 #elif defined(CONFIG_BSC9132)
 #define CONFIG_MAX_CPUS			2
@@ -575,6 +577,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 #define CONFIG_SYS_FSL_A004447_SVR_REV	0x11
+#define CONFIG_ESDHC_HC_BLK_ADDR
 
 #elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160)
 #define CONFIG_E6500
diff --git a/board/freescale/common/sdhc_boot.c b/board/freescale/common/sdhc_boot.c
index f6e2b2b..022f38b 100644
--- a/board/freescale/common/sdhc_boot.c
+++ b/board/freescale/common/sdhc_boot.c
@@ -16,6 +16,8 @@
 #define ESDHC_BOOT_IMAGE_SIZE	0x48
 #define ESDHC_BOOT_IMAGE_ADDR	0x50
 
+#define ESDHC_DEFAULT_ENVADDR	0x400
+
 int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)
 {
 	u8 *tmp_buf;
@@ -39,6 +41,33 @@ int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)
 	/* Get the code size from offset 0x48 */
 	code_len = *(u32 *)(tmp_buf + ESDHC_BOOT_IMAGE_SIZE);
 
+#ifdef CONFIG_ESDHC_HC_BLK_ADDR
+	/*
+	 * On soc BSC9131, BSC9132:
+	 * In High Capacity SD Cards (> 2 GBytes), the 32-bit source address and
+	 * code length of these soc specify the memory address in block address
+	 * format. Block length is fixed to 512 bytes as per the SD High
+	 * Capacity specification.
+	 */
+	u64 tmp;
+
+	if (mmc->high_capacity) {
+		tmp = (u64)code_offset * blklen;
+		tmp += code_len * blklen;
+	} else
+		tmp = code_offset + code_len;
+
+	if ((tmp + CONFIG_ENV_SIZE > mmc->capacity) ||
+			(tmp > 0xFFFFFFFFU))
+		*env_addr = ESDHC_DEFAULT_ENVADDR;
+	else
+		*env_addr = tmp;
+
+	free(tmp_buf);
+
+	return 0;
+#endif
+
 	*env_addr = code_offset + code_len;
 
 	free(tmp_buf);
-- 
1.8.4.1

[U-Boot] [PATCH 3/3 V3] eSDHC: Calculate envaddr accroding to the address format

[Pantelis Antoniou]

Hi Haijun,

On Jan 10, 2014, at 7:52 AM, Haijun Zhang wrote:

> On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the
> 32-bit source address specifies the memory address in block address
> format. Block length is fixed to 512 bytes as per the SD High Capacity
> specification. So we need to convert the block address format
> to byte address format to calculate the envaddr.
> 
> If there is no enough space for environment variables or envaddr
> is larger than 4GiB, we relocate the envaddr to 0x400. The address
> relocated is in the front of the first partition that is assigned
> for sdboot only.
> 
> Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
> ---
> changes for V3:
>        - Define quirk in SOC specific file instead of code in driver
> changes for V2:
> 	- Use 0xffffffffu instead of UINT_MAX
> 
> arch/powerpc/include/asm/config_mpc85xx.h |  3 +++
> board/freescale/common/sdhc_boot.c        | 29 +++++++++++++++++++++++++++++
> 2 files changed, 32 insertions(+)
> 
> diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
> index 15affdc..e8bd76a 100644
> --- a/arch/powerpc/include/asm/config_mpc85xx.h
> +++ b/arch/powerpc/include/asm/config_mpc85xx.h
> @@ -152,6 +152,7 @@
> #define CONFIG_SYS_FSL_ERRATUM_A005125
> #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
> #define CONFIG_SYS_FSL_A004447_SVR_REV	0x10
> +#define CONFIG_ESDHC_HC_BLK_ADDR
> 
> /* P1011 is single core version of P1020 */
> #elif defined(CONFIG_P1011)
> @@ -552,6 +553,7 @@
> #define CONFIG_NAND_FSL_IFC
> #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
> #define CONFIG_SYS_FSL_ERRATUM_A005125
> +#define CONFIG_ESDHC_HC_BLK_ADDR
> 
> #elif defined(CONFIG_BSC9132)
> #define CONFIG_MAX_CPUS			2
> @@ -575,6 +577,7 @@
> #define CONFIG_SYS_FSL_ERRATUM_A005125
> #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
> #define CONFIG_SYS_FSL_A004447_SVR_REV	0x11
> +#define CONFIG_ESDHC_HC_BLK_ADDR
> 
> #elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160)
> #define CONFIG_E6500
> diff --git a/board/freescale/common/sdhc_boot.c b/board/freescale/common/sdhc_boot.c
> index f6e2b2b..022f38b 100644
> --- a/board/freescale/common/sdhc_boot.c
> +++ b/board/freescale/common/sdhc_boot.c
> @@ -16,6 +16,8 @@
> #define ESDHC_BOOT_IMAGE_SIZE	0x48
> #define ESDHC_BOOT_IMAGE_ADDR	0x50
> 
> +#define ESDHC_DEFAULT_ENVADDR	0x400
> +
> int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)
> {
> 	u8 *tmp_buf;
> @@ -39,6 +41,33 @@ int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)
> 	/* Get the code size from offset 0x48 */
> 	code_len = *(u32 *)(tmp_buf + ESDHC_BOOT_IMAGE_SIZE);
> 
> +#ifdef CONFIG_ESDHC_HC_BLK_ADDR
> +	/*
> +	 * On soc BSC9131, BSC9132:
> +	 * In High Capacity SD Cards (> 2 GBytes), the 32-bit source address and
> +	 * code length of these soc specify the memory address in block address
> +	 * format. Block length is fixed to 512 bytes as per the SD High
> +	 * Capacity specification.
> +	 */
> +	u64 tmp;
> +
> +	if (mmc->high_capacity) {
> +		tmp = (u64)code_offset * blklen;
> +		tmp += code_len * blklen;
> +	} else
> +		tmp = code_offset + code_len;
> +
> +	if ((tmp + CONFIG_ENV_SIZE > mmc->capacity) ||
> +			(tmp > 0xFFFFFFFFU))
> +		*env_addr = ESDHC_DEFAULT_ENVADDR;
> +	else
> +		*env_addr = tmp;
> +
> +	free(tmp_buf);
> +
> +	return 0;
> +#endif
> +
> 	*env_addr = code_offset + code_len;
> 
> 	free(tmp_buf);
> -- 
> 1.8.4.1
> 
> 

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

[U-Boot] [PATCH 1/3 V3] esdhc: Workaround for card can't be detected on T4240QDS

[York Sun]

Pantelis,

On 01/09/2014 09:52 PM, Haijun Zhang wrote:
> Card detection pin is ineffective on T4240QDS Rev1.0.
> There are two cards can be connected to board.
> 1. eMMC card is built-in board, can not be removed. so
>    For eMMC card it is always there.
> 2. Card detecting pin is functional for SDHC card in Rev2.0.
> 
> This workaround force sdhc driver scan and initialize the card
> regardless of whether the card is inserted or not in case Rev1.0.
> 
> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
> ---
> changes for V3:
> 	- Define quirk in board specific file instead of code in driver
> changes for V2:
> 	- Add the judgement condition for this broken card
> 

I think this set of patches are in your backyard. If you ack them, I can apply
them to mpc85xx.

http://patchwork.ozlabs.org/patch/309168/
http://patchwork.ozlabs.org/patch/309167/
http://patchwork.ozlabs.org/patch/309170/

York

[U-Boot] [PATCH 1/3 V3] esdhc: Workaround for card can't be detected on T4240QDS

[Pantelis Antoniou]

Hi York,

On Jan 22, 2014, at 12:01 AM, York Sun wrote:

> Pantelis,
> 
> On 01/09/2014 09:52 PM, Haijun Zhang wrote:
>> Card detection pin is ineffective on T4240QDS Rev1.0.
>> There are two cards can be connected to board.
>> 1. eMMC card is built-in board, can not be removed. so
>>   For eMMC card it is always there.
>> 2. Card detecting pin is functional for SDHC card in Rev2.0.
>> 
>> This workaround force sdhc driver scan and initialize the card
>> regardless of whether the card is inserted or not in case Rev1.0.
>> 
>> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
>> ---
>> changes for V3:
>> 	- Define quirk in board specific file instead of code in driver
>> changes for V2:
>> 	- Add the judgement condition for this broken card
>> 
> 
> I think this set of patches are in your backyard. If you ack them, I can apply
> them to mpc85xx.
> 

Go ahead please.

> http://patchwork.ozlabs.org/patch/309168/
> http://patchwork.ozlabs.org/patch/309167/
> http://patchwork.ozlabs.org/patch/309170/
> 
> York
> 

Regards

-- Pantelis

[U-Boot] [PATCH 1/3 V3] esdhc: Workaround for card can't be detected on T4240QDS

[Zhang Haijun]

Many thanks.

Pantelis and York

How about below patch?

http://patchwork.ozlabs.org/patch/283002/

It's about esdhc, but is in york's backyard.


Regards

Haijun

On 01/22/2014 08:01 PM, Pantelis Antoniou wrote:
> Hi York,
>
> On Jan 22, 2014, at 12:01 AM, York Sun wrote:
>
>> Pantelis,
>>
>> On 01/09/2014 09:52 PM, Haijun Zhang wrote:
>>> Card detection pin is ineffective on T4240QDS Rev1.0.
>>> There are two cards can be connected to board.
>>> 1. eMMC card is built-in board, can not be removed. so
>>>    For eMMC card it is always there.
>>> 2. Card detecting pin is functional for SDHC card in Rev2.0.
>>>
>>> This workaround force sdhc driver scan and initialize the card
>>> regardless of whether the card is inserted or not in case Rev1.0.
>>>
>>> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
>>> ---
>>> changes for V3:
>>> 	- Define quirk in board specific file instead of code in driver
>>> changes for V2:
>>> 	- Add the judgement condition for this broken card
>>>
>> I think this set of patches are in your backyard. If you ack them, I can apply
>> them to mpc85xx.
>>
> Go ahead please.
>
>> http://patchwork.ozlabs.org/patch/309168/
>> http://patchwork.ozlabs.org/patch/309167/
>> http://patchwork.ozlabs.org/patch/309170/
>>
>> York
>>
> Regards
>
> -- Pantelis
>
>
>

[U-Boot] [PATCH 1/3 V3] esdhc: Workaround for card can't be detected on T4240QDS

[Pantelis Antoniou]

Hi Haijun,

On Jan 10, 2014, at 7:52 AM, Haijun Zhang wrote:

> Card detection pin is ineffective on T4240QDS Rev1.0.
> There are two cards can be connected to board.
> 1. eMMC card is built-in board, can not be removed. so
>   For eMMC card it is always there.
> 2. Card detecting pin is functional for SDHC card in Rev2.0.
> 
> This workaround force sdhc driver scan and initialize the card
> regardless of whether the card is inserted or not in case Rev1.0.
> 
> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
> ---
> changes for V3:
> 	- Define quirk in board specific file instead of code in driver
> changes for V2:
> 	- Add the judgement condition for this broken card
> 
> drivers/mmc/fsl_esdhc.c    | 4 ++++
> include/configs/T4240QDS.h | 5 +++++
> 2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index e522a70..2ee93cd 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -548,6 +548,10 @@ static int esdhc_getcd(struct mmc *mmc)
> 	struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
> 	int timeout = 1000;
> 
> +#ifdef CONFIG_ESDHC_DETECT_QUIRK
> +	if (CONFIG_ESDHC_DETECT_QUIRK)
> +		return 1;
> +#endif
> 	while (!(esdhc_read32(&regs->prsstat) & PRSSTAT_CINS) && --timeout)
> 		udelay(1000);
> 
> diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
> index c96df54..0e0b346 100644
> --- a/include/configs/T4240QDS.h
> +++ b/include/configs/T4240QDS.h
> @@ -165,6 +165,8 @@ unsigned long get_board_ddr_clk(void);
> #define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20
> #define QIXIS_RCFG_CTL_RECONFIG_START	0x21
> #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
> +#define QIXIS_BRDCFG5			0x55
> +#define QIXIS_MUX_SDHC			2
> #define QIXIS_BASE_PHYS		(0xf00000000ull | QIXIS_BASE)
> 
> #define CONFIG_SYS_CSPR3_EXT	(0xf)
> @@ -466,6 +468,9 @@ unsigned long get_board_ddr_clk(void);
> #define CONFIG_CMD_FAT
> #define CONFIG_DOS_PARTITION
> #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
> +#define CONFIG_ESDHC_DETECT_QUIRK \
> +	(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \
> +	IS_SVR_REV(get_svr(), 1, 0))
> #endif
> 
> #define CONFIG_BOOTDELAY	10	/* -1 disables auto-boot */
> -- 
> 1.8.4.1
> 
> 

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>