From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stephen Warren <swarren@wwwdotorg.org>
Date: Thu, 06 Feb 2014 23:48:06 -0700
Subject: [U-Boot] [PATCH 2/2] usb: ehci: fully align interrupt QHs/QTDs
In-Reply-To: <201402070353.42180.marex@denx.de>
References: <1391717586-5086-1-git-send-email-swarren@wwwdotorg.org>
	<1391717586-5086-2-git-send-email-swarren@wwwdotorg.org>
	<201402070353.42180.marex@denx.de>
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On 02/06/2014 07:53 PM, Marek Vasut wrote:
> On Thursday, February 06, 2014 at 09:13:06 PM, Stephen Warren wrote:
>> From: Stephen Warren <swarren@nvidia.com>
>>
>> These data structures are passed to cache-flushing routines, and hence
>> must be conform to both the USB the cache-flusing alignment requirements.
>> That means aligning to USB_DMA_MINALIGN. This is important on systems
>> where cache lines are >32 bytes.
>>
>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> 
> Acked-by: Marek Vasut <marex@denx.de>

Oh, I assumed you would be applying this?