[U-Boot] arm64 patch: gicv3 support

[Arnab Basu <arnab.basu@freescale.com>]

Hi David

On 10-Feb-14 1:41 PM, FengHua wrote:
> 
>>> +	/* Initialize All ReDistributors */
>>> +1:	ldr	x1, =GICR_BASE
>>> +2:	mov	w0, #~0x2
>>> +	ldr	w2, [x1, GICR_WAKER]
>>> +	and	w2, w2, w0		/* Clear ProcessorSleep */
>>> +	str	w2, [x1, GICR_WAKER]
>>> +	dsb	st
>>> +	isb
>>> +0:	ldr	w0, [x1, GICR_WAKER]
>>> +	tbnz	w0, #2, 0b		/* Wait Children be Alive */
>>> +
>>> +	add	x2, x1, #(1 << 16)	/* SGI_Base */
>>> +	mov	w5, #~0
>>> +	str	w5, [x2, GICR_IGROUPRn]
>>> +	str	wzr, [x2, GICR_IGROUPMODRn]	/* SGIs|PPIs Group1NS */
>>> +	mov	w0, #0x1		/* Enable SGI 0 */
>>> +	str	w0, [x2, GICR_ISENABLERn]
>>> +
>>> +	ldr	w0, [x1, GICR_TYPER]
>>> +	add	x1, x1, #(2 << 16)
>>> +	tbz	w0, #4, 2b		/* Next ReDistributor if Exist */
>>
>> I am not sure that this is a good idea. Why should the primary code initialize all redistributors?
>> Would it not be a better idea to make this code per cpu and let each core initialize its own
>> redistributor interface?
>>
> Yes, the redistributor could be initialized by it's corresponding processor.
> But, how could we determine the correspondence of redistributors and processors?
> It will be implementation specific and the code will be a little more complicated.
> 

Each processor should compare the affinity encoded in the GICR_TYPER[63:32] bits for all redistributors 
with the affinity encoded in its own MPIDR_EL1 and only initialize the matching redistributor.
Why will this be implementation specific?

Yes code will possibly be more complicated but it will be much more robust, consider the case when
all CPUs are not being brought out of reset simultaneously. In this case we might not want to wake
up all the redistributors.

Thanks
Arnab