From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 19BD3C433F5 for ; Mon, 11 Apr 2022 02:24:54 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id EECBE83B10; Mon, 11 Apr 2022 04:24:51 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rock-chips.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 7505E83ABE; Mon, 11 Apr 2022 04:24:49 +0200 (CEST) Received: from mail-m17664.qiye.163.com (mail-m17664.qiye.163.com [59.111.176.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id EE42A83ABE for ; Mon, 11 Apr 2022 04:24:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=kever.yang@rock-chips.com Received: from [172.16.12.93] (unknown [58.22.7.114]) by mail-m17664.qiye.163.com (Hmail) with ESMTPA id 5F2881402A5; Mon, 11 Apr 2022 10:24:34 +0800 (CST) Message-ID: <52fac5aa-1a45-2af0-e294-c5c11eec8a2e@rock-chips.com> Date: Mon, 11 Apr 2022 10:24:34 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH v5 08/13] rockchip: mmc: rockchip_dw_mmc: add rk3066/rk3188 support Content-Language: en-US To: Johan Jonker Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, heiko@sntech.de, peng.fan@nxp.com, jh80.chung@samsung.com, u-boot@lists.denx.de References: <20220409165514.19220-1-jbx6244@gmail.com> <20220409165514.19220-9-jbx6244@gmail.com> From: Kever Yang In-Reply-To: <20220409165514.19220-9-jbx6244@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZCBgUCR5ZQVlLVUtZV1 kWDxoPAgseWUFZKDYvK1lXWShZQUlKS0tKN1dZLVlBSVdZDwkaFQgSH1lBWUJMSx1WTh8fHk5KSU hPShpCVRMBExYaEhckFA4PWVdZFhoPEhUdFFlBWU9LSFVKSktISkNVS1kG X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PRw6Hxw5Oj5CCUILUUMyODAf NiMwCUhVSlVKTU9CTU9IQ0xPTENKVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlOQ1VJSVVMVUpKT1lXWQgBWUFISU9PNwY+ X-HM-Tid: 0a80166fe90ada2fkuws5f2881402a5 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On 2022/4/10 00:55, Johan Jonker wrote: > The Rockchip SoCs rk3066/rk3188 have MMC DT nodes > with as compatible string "rockchip,rk2928-dw-mshc". > Add OF_PLATDATA support to the existing driver with > help of a DM_DRIVER_ALIAS. > > This type needs a permanent enabled fifo. > The other Rockchip SoCs always have the property > "u-boot,spl-fifo-mode" in the MMC DT nodes, > because MMC to SRAM can't do DMA. > Make this property a requirement for MMC OF_PLATDATA > structures. The property "fifo-mode" must be added > for all other compile modes. > > Signed-off-by: Johan Jonker Reviewed-by: Kever Yang Thanks, - Kever > --- > > Changed V5: > reword > remove driver_data > add OF_PLATDATA u_boot_spl_fifo_mode requirement > > Changed V4: > use boolean > --- > drivers/mmc/rockchip_dw_mmc.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c > index be065ec0c3..573bf16c87 100644 > --- a/drivers/mmc/rockchip_dw_mmc.c > +++ b/drivers/mmc/rockchip_dw_mmc.c > @@ -119,7 +119,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev) > host->priv = dev; > host->dev_index = 0; > priv->fifo_depth = dtplat->fifo_depth; > - priv->fifo_mode = 0; > + priv->fifo_mode = dtplat->u_boot_spl_fifo_mode; > priv->minmax[0] = 400000; /* 400 kHz */ > priv->minmax[1] = dtplat->max_frequency; > > @@ -180,5 +180,6 @@ U_BOOT_DRIVER(rockchip_rk3288_dw_mshc) = { > .plat_auto = sizeof(struct rockchip_mmc_plat), > }; > > +DM_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk2928_dw_mshc) > DM_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3328_dw_mshc) > DM_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3368_dw_mshc)