* [U-Boot] [PATCH v3 2/2] socfpga: Adding DesignWare watchdog support
@ 2014-02-21 20:57 Chin Liang See
2014-02-24 7:52 ` Michal Simek
0 siblings, 1 reply; 5+ messages in thread
From: Chin Liang See @ 2014-02-21 20:57 UTC (permalink / raw)
To: u-boot
To enable the DesignWare watchdog support at SOCFPGA Cyclone V
dev kit.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
---
Changes for v3
- Split to 2 series patch
Changes for v2
- Enable this driver at socfpga_cyclone5 board
---
.../include/asm/arch-socfpga/socfpga_base_addrs.h | 1 +
include/configs/socfpga_cyclone5.h | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
index 20f12e0..5f73824 100644
--- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
+++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
@@ -11,6 +11,7 @@
#define SOCFPGA_UART0_ADDRESS 0xffc02000
#define SOCFPGA_UART1_ADDRESS 0xffc03000
#define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
+#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
#define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index fc921ee..1b78ccb 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -207,6 +207,16 @@
#define CONFIG_ENV_IS_NOWHERE
/*
+ * L4 Watchdog
+ */
+#define CONFIG_HW_WATCHDOG
+#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 2000
+#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
+/* Clocks source frequency to watchdog timer */
+#define CONFIG_DW_WDT_CLOCK_KHZ 25000
+
+/*
* SPL "Second Program Loader" aka Initial Software
*/
@@ -238,4 +248,7 @@
/* Support for lib/libgeneric.o in SPL binary */
#define CONFIG_SPL_LIBGENERIC_SUPPORT
+/* Support for watchdog */
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+
#endif /* __CONFIG_H */
--
1.7.9.5
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v3 2/2] socfpga: Adding DesignWare watchdog support
2014-02-21 20:57 [U-Boot] [PATCH v3 2/2] socfpga: Adding DesignWare watchdog support Chin Liang See
@ 2014-02-24 7:52 ` Michal Simek
2014-02-27 19:55 ` Chin Liang See
0 siblings, 1 reply; 5+ messages in thread
From: Michal Simek @ 2014-02-24 7:52 UTC (permalink / raw)
To: u-boot
On 02/21/2014 09:57 PM, Chin Liang See wrote:
> To enable the DesignWare watchdog support at SOCFPGA Cyclone V
> dev kit.
>
> Signed-off-by: Chin Liang See <clsee@altera.com>
> Cc: Anatolij Gustschin <agust@denx.de>
> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
> Cc: Heiko Schocher <hs@denx.de>
> Cc: Tom Rini <trini@ti.com>
> ---
> Changes for v3
> - Split to 2 series patch
> Changes for v2
> - Enable this driver at socfpga_cyclone5 board
> ---
> .../include/asm/arch-socfpga/socfpga_base_addrs.h | 1 +
> include/configs/socfpga_cyclone5.h | 13 +++++++++++++
> 2 files changed, 14 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> index 20f12e0..5f73824 100644
> --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> @@ -11,6 +11,7 @@
> #define SOCFPGA_UART0_ADDRESS 0xffc02000
> #define SOCFPGA_UART1_ADDRESS 0xffc03000
> #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
> +#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
> #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
> #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
> #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
> diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
> index fc921ee..1b78ccb 100644
> --- a/include/configs/socfpga_cyclone5.h
> +++ b/include/configs/socfpga_cyclone5.h
> @@ -207,6 +207,16 @@
> #define CONFIG_ENV_IS_NOWHERE
>
> /*
> + * L4 Watchdog
> + */
Why multiline comment here?
> +#define CONFIG_HW_WATCHDOG
> +#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 2000
> +#define CONFIG_DESIGNWARE_WATCHDOG
> +#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
Why not just use SOCFPGA_L4WD0_ADDRESS directly?
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v3 2/2] socfpga: Adding DesignWare watchdog support
2014-02-24 7:52 ` Michal Simek
@ 2014-02-27 19:55 ` Chin Liang See
2014-02-28 10:31 ` Michal Simek
0 siblings, 1 reply; 5+ messages in thread
From: Chin Liang See @ 2014-02-27 19:55 UTC (permalink / raw)
To: u-boot
Hi Michal,
On Mon, 2014-02-24 at 08:52 +0100, Michal Simek wrote:
> On 02/21/2014 09:57 PM, Chin Liang See wrote:
> > To enable the DesignWare watchdog support at SOCFPGA Cyclone V
> > dev kit.
> >
> > Signed-off-by: Chin Liang See <clsee@altera.com>
> > Cc: Anatolij Gustschin <agust@denx.de>
> > Cc: Albert Aribaud <albert.u.boot@aribaud.net>
> > Cc: Heiko Schocher <hs@denx.de>
> > Cc: Tom Rini <trini@ti.com>
> > ---
> > Changes for v3
> > - Split to 2 series patch
> > Changes for v2
> > - Enable this driver at socfpga_cyclone5 board
> > ---
> > .../include/asm/arch-socfpga/socfpga_base_addrs.h | 1 +
> > include/configs/socfpga_cyclone5.h | 13 +++++++++++++
> > 2 files changed, 14 insertions(+)
> >
> > diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> > index 20f12e0..5f73824 100644
> > --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> > +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> > @@ -11,6 +11,7 @@
> > #define SOCFPGA_UART0_ADDRESS 0xffc02000
> > #define SOCFPGA_UART1_ADDRESS 0xffc03000
> > #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
> > +#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
> > #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
> > #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
> > #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
> > diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
> > index fc921ee..1b78ccb 100644
> > --- a/include/configs/socfpga_cyclone5.h
> > +++ b/include/configs/socfpga_cyclone5.h
> > @@ -207,6 +207,16 @@
> > #define CONFIG_ENV_IS_NOWHERE
> >
> > /*
> > + * L4 Watchdog
> > + */
>
> Why multiline comment here?
Oh its just for easy reading.
>
> > +#define CONFIG_HW_WATCHDOG
> > +#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 2000
> > +#define CONFIG_DESIGNWARE_WATCHDOG
> > +#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
>
> Why not just use SOCFPGA_L4WD0_ADDRESS directly?
Nope, cause this driver might be used by other platform.
Thanks
Chin Liang
>
> Thanks,
> Michal
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v3 2/2] socfpga: Adding DesignWare watchdog support
2014-02-27 19:55 ` Chin Liang See
@ 2014-02-28 10:31 ` Michal Simek
2014-03-04 23:49 ` Chin Liang See
0 siblings, 1 reply; 5+ messages in thread
From: Michal Simek @ 2014-02-28 10:31 UTC (permalink / raw)
To: u-boot
On 02/27/2014 08:55 PM, Chin Liang See wrote:
> Hi Michal,
>
> On Mon, 2014-02-24 at 08:52 +0100, Michal Simek wrote:
>> On 02/21/2014 09:57 PM, Chin Liang See wrote:
>>> To enable the DesignWare watchdog support at SOCFPGA Cyclone V
>>> dev kit.
>>>
>>> Signed-off-by: Chin Liang See <clsee@altera.com>
>>> Cc: Anatolij Gustschin <agust@denx.de>
>>> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
>>> Cc: Heiko Schocher <hs@denx.de>
>>> Cc: Tom Rini <trini@ti.com>
>>> ---
>>> Changes for v3
>>> - Split to 2 series patch
>>> Changes for v2
>>> - Enable this driver at socfpga_cyclone5 board
>>> ---
>>> .../include/asm/arch-socfpga/socfpga_base_addrs.h | 1 +
>>> include/configs/socfpga_cyclone5.h | 13 +++++++++++++
>>> 2 files changed, 14 insertions(+)
>>>
>>> diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
>>> index 20f12e0..5f73824 100644
>>> --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
>>> +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
>>> @@ -11,6 +11,7 @@
>>> #define SOCFPGA_UART0_ADDRESS 0xffc02000
>>> #define SOCFPGA_UART1_ADDRESS 0xffc03000
>>> #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
>>> +#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
>>> #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
>>> #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
>>> #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
>>> diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
>>> index fc921ee..1b78ccb 100644
>>> --- a/include/configs/socfpga_cyclone5.h
>>> +++ b/include/configs/socfpga_cyclone5.h
>>> @@ -207,6 +207,16 @@
>>> #define CONFIG_ENV_IS_NOWHERE
>>>
>>> /*
>>> + * L4 Watchdog
>>> + */
>>
>> Why multiline comment here?
>
> Oh its just for easy reading.
>
>>
>>> +#define CONFIG_HW_WATCHDOG
>>> +#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 2000
>>> +#define CONFIG_DESIGNWARE_WATCHDOG
>>> +#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
>>
>> Why not just use SOCFPGA_L4WD0_ADDRESS directly?
>
> Nope, cause this driver might be used by other platform.
ok It means that SOCFPGA_L4WD0_ADDRESS is system controller right?
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v3 2/2] socfpga: Adding DesignWare watchdog support
2014-02-28 10:31 ` Michal Simek
@ 2014-03-04 23:49 ` Chin Liang See
0 siblings, 0 replies; 5+ messages in thread
From: Chin Liang See @ 2014-03-04 23:49 UTC (permalink / raw)
To: u-boot
On Fri, 2014-02-28 at 11:31 +0100, Michal Simek wrote:
> On 02/27/2014 08:55 PM, Chin Liang See wrote:
> > Hi Michal,
> >
> > On Mon, 2014-02-24 at 08:52 +0100, Michal Simek wrote:
> >> On 02/21/2014 09:57 PM, Chin Liang See wrote:
> >>> To enable the DesignWare watchdog support at SOCFPGA Cyclone V
> >>> dev kit.
> >>>
> >>> Signed-off-by: Chin Liang See <clsee@altera.com>
> >>> Cc: Anatolij Gustschin <agust@denx.de>
> >>> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
> >>> Cc: Heiko Schocher <hs@denx.de>
> >>> Cc: Tom Rini <trini@ti.com>
> >>> ---
> >>> Changes for v3
> >>> - Split to 2 series patch
> >>> Changes for v2
> >>> - Enable this driver at socfpga_cyclone5 board
> >>> ---
> >>> .../include/asm/arch-socfpga/socfpga_base_addrs.h | 1 +
> >>> include/configs/socfpga_cyclone5.h | 13 +++++++++++++
> >>> 2 files changed, 14 insertions(+)
> >>>
> >>> diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> >>> index 20f12e0..5f73824 100644
> >>> --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> >>> +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> >>> @@ -11,6 +11,7 @@
> >>> #define SOCFPGA_UART0_ADDRESS 0xffc02000
> >>> #define SOCFPGA_UART1_ADDRESS 0xffc03000
> >>> #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
> >>> +#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
> >>> #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
> >>> #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
> >>> #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
> >>> diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
> >>> index fc921ee..1b78ccb 100644
> >>> --- a/include/configs/socfpga_cyclone5.h
> >>> +++ b/include/configs/socfpga_cyclone5.h
> >>> @@ -207,6 +207,16 @@
> >>> #define CONFIG_ENV_IS_NOWHERE
> >>>
> >>> /*
> >>> + * L4 Watchdog
> >>> + */
> >>
> >> Why multiline comment here?
> >
> > Oh its just for easy reading.
> >
> >>
> >>> +#define CONFIG_HW_WATCHDOG
> >>> +#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 2000
> >>> +#define CONFIG_DESIGNWARE_WATCHDOG
> >>> +#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
> >>
> >> Why not just use SOCFPGA_L4WD0_ADDRESS directly?
> >
> > Nope, cause this driver might be used by other platform.
>
> ok It means that SOCFPGA_L4WD0_ADDRESS is system controller right?
Its the base address for watchdog registers.
Thanks
Chin Liang
>
> Thanks,
> Michal
>
^ permalink raw reply [flat|nested] 5+ messages in thread
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2014-02-21 20:57 [U-Boot] [PATCH v3 2/2] socfpga: Adding DesignWare watchdog support Chin Liang See
2014-02-24 7:52 ` Michal Simek
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2014-02-28 10:31 ` Michal Simek
2014-03-04 23:49 ` Chin Liang See
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