From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Mon, 24 Feb 2014 15:50:42 -0800 Subject: [U-Boot] [PATCH 4/4 v2] powerpc: p1010rdb: Enable p1010rdb to start from NAND/SD/SPI flash with SPL In-Reply-To: <1390549809-23070-4-git-send-email-ying.zhang@freescale.com> References: <1390549809-23070-1-git-send-email-ying.zhang@freescale.com> <1390549809-23070-4-git-send-email-ying.zhang@freescale.com> Message-ID: <530BDAD2.3040901@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 01/23/2014 11:50 PM, ying.zhang at freescale.com wrote: > From: Ying Zhang > > In the previous patches, we introduced the SPL/TPL fraamework. > For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The > SPL was loaded by the code from the internal on-chip ROM. The SPL initializes > the DDR according to the SPD and loads the final uboot image into DDR, then > jump to the DDR to begin execution. > > For NAND booting way, the nand SPL has size limitation on some board(e.g. > P1010RDB), it can not be more than 8KB, we can call it "minimal SPL", So the > dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is > loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD > and loads the final uboot image into DDR,then jump to the DDR to begin execution. > > This patch enabled SPL/TPL for P1010RDB to support starting from NAND/SD/SPI > flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL. > Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to > execute, so the section .resetvec is no longer needed. > > Signed-off-by: Ying Zhang > --- > Change from v1: > - No change. Applied to u-boot-mpc85xx/master. Thanks. York