From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tomasz Figa Date: Sun, 16 Mar 2014 13:53:09 +0100 Subject: [U-Boot] Enabling uart 3 in arndale In-Reply-To: <0259D8EA-B62C-4D07-8661-ED2CF6E53779@gmail.com> References: <0259D8EA-B62C-4D07-8661-ED2CF6E53779@gmail.com> Message-ID: <53259EB5.8090202@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, On 14.03.2014 09:04, armdev wrote: > Hi, > > We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD and TXD are on pins 2 and 4 which as per the base board specification is connected as > > XuRXD3 : UART_3_RXD/GPA1[4] : 2 > XuTXD3 : UART_3_TXD/GPA1[5] : 4 > > As per the public reference manual of exynos 5250, there is a register GPACON (0x1140_0000) > Setting GPACON |= 0x0010_0000 should enable the pins, but I am not able to see any output on UART3. > > Can you please suggest what is the right procedure The register is GPA1CON and its GPA1CON[4] and [5] bit fields need both to be set to 0x2 - see Pad Control chapter of Exynos5250 public datasheet. Also GPA1PUD should be reconfigured to disable default pull-down on both pins, again you can find details of the register in the datasheet. Best regards, Tomasz