[U-Boot] Enabling uart 3 in arndale

[U-Boot] Enabling uart 3 in arndale

[armdev]

Hi,

We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD and TXD are on pins 2 and 4 which as per the base board specification is connected as 

XuRXD3 : UART_3_RXD/GPA1[4] : 2
XuTXD3 : UART_3_TXD/GPA1[5] : 4

As per the public reference manual of exynos 5250, there is a register GPACON (0x1140_0000) 
Setting GPACON |= 0x0010_0000 should enable the pins, but I am not able to see any output on UART3.

Can you please suggest what is the right procedure

-Regards
armdev team @FTM

[U-Boot] Enabling uart 3 in arndale

[armdev]

Please can someone help
On 14-Mar-2014, at 1:34 pm, armdev <armdev.ftm@gmail.com> wrote:

> Hi,
> 
> We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD and TXD are on pins 2 and 4 which as per the base board specification is connected as 
> 
> XuRXD3 : UART_3_RXD/GPA1[4] : 2
> XuTXD3 : UART_3_TXD/GPA1[5] : 4
> 
> As per the public reference manual of exynos 5250, there is a register GPACON (0x1140_0000) 
> Setting GPACON |= 0x0010_0000 should enable the pins, but I am not able to see any output on UART3.
> 
> Can you please suggest what is the right procedure
> 
> -Regards
> armdev team @FTM

[U-Boot] Enabling uart 3 in arndale

[Michael Trimarchi]

Hi

On Fri, Mar 14, 2014 at 9:04 AM, armdev <armdev.ftm@gmail.com> wrote:
> Hi,
>
> We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD and TXD are on pins 2 and 4 which as per the base board specification is connected as
>
> XuRXD3 : UART_3_RXD/GPA1[4] : 2
> XuTXD3 : UART_3_TXD/GPA1[5] : 4
>
> As per the public reference manual of exynos 5250, there is a register GPACON (0x1140_0000)
> Setting GPACON |= 0x0010_0000 should enable the pins, but I am not able to see any output on UART3.
>
> Can you please suggest what is the right procedure
>

Did you change the board console output ;)?

Michael

> -Regards
> armdev team @FTM
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

[U-Boot] Enabling uart 3 in arndale

[armdev]

Dear Michael,
Yep didn?t got any prints. So tried a hack.
a) Booted using uart 2
b) set the GPACON
c) Copied the config from 0x12c20000 to 0x12c30000
d)tried to write a char 0x41 (A) on 0x12c20020 0x12c30020, I got output on UART2 but not on UART3.

We would like to use both uarts. 
Have you used UART3, did the boot to UART3 worked for you ? So you see any problem with any of our steps listed in this / pref mail.

Thanks 
armdev team

On 16-Mar-2014, at 2:56 pm, Michael Trimarchi <michael@amarulasolutions.com> wrote:

> Hi
> 
> On Fri, Mar 14, 2014 at 9:04 AM, armdev <armdev.ftm@gmail.com> wrote:
>> Hi,
>> 
>> We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD and TXD are on pins 2 and 4 which as per the base board specification is connected as
>> 
>> XuRXD3 : UART_3_RXD/GPA1[4] : 2
>> XuTXD3 : UART_3_TXD/GPA1[5] : 4
>> 
>> As per the public reference manual of exynos 5250, there is a register GPACON (0x1140_0000)
>> Setting GPACON |= 0x0010_0000 should enable the pins, but I am not able to see any output on UART3.
>> 
>> Can you please suggest what is the right procedure
>> 
> 
> Did you change the board console output ;)?
> 
> Michael
> 
>> -Regards
>> armdev team @FTM
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> http://lists.denx.de/mailman/listinfo/u-boot
> 
> 
> 
> -- 
> | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
> | COO  -  Founder                                      Cruquiuskade 47 |
> | +31(0)851119172                                 Amsterdam 1018 AM NL |
> |                  [`as] http://www.amarulasolutions.com               |

[U-Boot] Enabling uart 3 in arndale

[Michael Trimarchi]

Hi

On Sun, Mar 16, 2014 at 11:07 AM, armdev <armdev.ftm@gmail.com> wrote:
> Dear Michael,
> Yep didn't got any prints. So tried a hack.
> a) Booted using uart 2
> b) set the GPACON
> c) Copied the config from 0x12c20000 to 0x12c30000
> d)tried to write a char 0x41 (A) on 0x12c20020 0x12c30020, I got output on UART2 but not on UART3.
>
> We would like to use both uarts.
> Have you used UART3, did the boot to UART3 worked for you ? So you see any problem with any of our steps listed in this / pref mail.
>

Are you sure that you don't need to clock uart logic? I don't have
such board I'm trying just to help you

Michael

> Thanks
> armdev team
>
> On 16-Mar-2014, at 2:56 pm, Michael Trimarchi <michael@amarulasolutions.com> wrote:
>
>> Hi
>>
>> On Fri, Mar 14, 2014 at 9:04 AM, armdev <armdev.ftm@gmail.com> wrote:
>>> Hi,
>>>
>>> We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD and TXD are on pins 2 and 4 which as per the base board specification is connected as
>>>
>>> XuRXD3 : UART_3_RXD/GPA1[4] : 2
>>> XuTXD3 : UART_3_TXD/GPA1[5] : 4
>>>
>>> As per the public reference manual of exynos 5250, there is a register GPACON (0x1140_0000)
>>> Setting GPACON |= 0x0010_0000 should enable the pins, but I am not able to see any output on UART3.
>>>
>>> Can you please suggest what is the right procedure
>>>
>>
>> Did you change the board console output ;)?
>>
>> Michael
>>
>>> -Regards
>>> armdev team @FTM
>>> _______________________________________________
>>> U-Boot mailing list
>>> U-Boot at lists.denx.de
>>> http://lists.denx.de/mailman/listinfo/u-boot
>>
>>
>>
>> --
>> | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
>> | COO  -  Founder                                      Cruquiuskade 47 |
>> | +31(0)851119172                                 Amsterdam 1018 AM NL |
>> |                  [`as] http://www.amarulasolutions.com               |
>



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

[U-Boot] Enabling uart 3 in arndale

[armdev]

Dear Michael,
Thanks for taking out time to extend help.

As per the RefManual the UART is taking the SCLK_UART Clock and as there are 4 channels (4 UARTS).

Following is from the public exynos 5250 manual (http://www.samsung.com/global/business/semiconductor/file/product/Exynos_5_Dual_User_Manaul_Public_REV100-0.pdf)

"Four independent channels with asynchronous and serial input/output ports for general purpose (Channel 0 to 3), and One channel in ISP (ISP-UART Channel 0)
 ?
	? Each UART contains a Baud-rate generator, a Transmitter, a Receiver and a Control Unit. The Baud-rate generator uses SCLK_UART."

-Regards
Armdev Team

On 16-Mar-2014, at 3:55 pm, Michael Trimarchi <michael@amarulasolutions.com> wrote:

> Hi
> 
> On Sun, Mar 16, 2014 at 11:07 AM, armdev <armdev.ftm@gmail.com> wrote:
>> Dear Michael,
>> Yep didn't got any prints. So tried a hack.
>> a) Booted using uart 2
>> b) set the GPACON
>> c) Copied the config from 0x12c20000 to 0x12c30000
>> d)tried to write a char 0x41 (A) on 0x12c20020 0x12c30020, I got output on UART2 but not on UART3.
>> 
>> We would like to use both uarts.
>> Have you used UART3, did the boot to UART3 worked for you ? So you see any problem with any of our steps listed in this / pref mail.
>> 
> 
> Are you sure that you don't need to clock uart logic? I don't have
> such board I'm trying just to help you
> 
> Michael
> 
>> Thanks
>> armdev team
>> 
>> On 16-Mar-2014, at 2:56 pm, Michael Trimarchi <michael@amarulasolutions.com> wrote:
>> 
>>> Hi
>>> 
>>> On Fri, Mar 14, 2014 at 9:04 AM, armdev <armdev.ftm@gmail.com> wrote:
>>>> Hi,
>>>> 
>>>> We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD and TXD are on pins 2 and 4 which as per the base board specification is connected as
>>>> 
>>>> XuRXD3 : UART_3_RXD/GPA1[4] : 2
>>>> XuTXD3 : UART_3_TXD/GPA1[5] : 4
>>>> 
>>>> As per the public reference manual of exynos 5250, there is a register GPACON (0x1140_0000)
>>>> Setting GPACON |= 0x0010_0000 should enable the pins, but I am not able to see any output on UART3.
>>>> 
>>>> Can you please suggest what is the right procedure
>>>> 
>>> 
>>> Did you change the board console output ;)?
>>> 
>>> Michael
>>> 
>>>> -Regards
>>>> armdev team @FTM
>>>> _______________________________________________
>>>> U-Boot mailing list
>>>> U-Boot at lists.denx.de
>>>> http://lists.denx.de/mailman/listinfo/u-boot
>>> 
>>> 
>>> 
>>> --
>>> | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
>>> | COO  -  Founder                                      Cruquiuskade 47 |
>>> | +31(0)851119172                                 Amsterdam 1018 AM NL |
>>> |                  [`as] http://www.amarulasolutions.com               |
>> 
> 
> 
> 
> -- 
> | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
> | COO  -  Founder                                      Cruquiuskade 47 |
> | +31(0)851119172                                 Amsterdam 1018 AM NL |
> |                  [`as] http://www.amarulasolutions.com               |

[U-Boot] Enabling uart 3 in arndale

[Tomasz Figa]

Hi,

On 16.03.2014 11:42, armdev wrote:
> Dear Michael,
> Thanks for taking out time to extend help.
>
> As per the RefManual the UART is taking the SCLK_UART Clock and as there are 4 channels (4 UARTS).
>
> Following is from the public exynos 5250 manual (http://www.samsung.com/global/business/semiconductor/file/product/Exynos_5_Dual_User_Manaul_Public_REV100-0.pdf)
>
> "Four independent channels with asynchronous and serial input/output ports for general purpose (Channel 0 to 3), and One channel in ISP (ISP-UART Channel 0)
>   ?
> 	? Each UART contains a Baud-rate generator, a Transmitter, a Receiver and a Control Unit. The Baud-rate generator uses SCLK_UART."

Each UART block uses independent clock source, i.e. UART0 uses 
SCLK_UART0 and UART3 uses SCLK_UART3.

Do you have MUX_UART3 and DIV_UART3 configured properly? Do you have the 
IP bus clock (CLK_UART3) ungated?

The public manual contains full description of clock tree and clock 
controller registers, so you should be able to figure this out.

Best regards,
Tomasz

[U-Boot] Enabling uart 3 in arndale

[Tomasz Figa]

Hi,

On 14.03.2014 09:04, armdev wrote:
> Hi,
>
> We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD and TXD are on pins 2 and 4 which as per the base board specification is connected as
>
> XuRXD3 : UART_3_RXD/GPA1[4] : 2
> XuTXD3 : UART_3_TXD/GPA1[5] : 4
>
> As per the public reference manual of exynos 5250, there is a register GPACON (0x1140_0000)
> Setting GPACON |= 0x0010_0000 should enable the pins, but I am not able to see any output on UART3.
>
> Can you please suggest what is the right procedure

The register is GPA1CON and its GPA1CON[4] and [5] bit fields need both 
to be set to 0x2 - see Pad Control chapter of Exynos5250 public 
datasheet. Also GPA1PUD should be reconfigured to disable default 
pull-down on both pins, again you can find details of the register in 
the datasheet.

Best regards,
Tomasz

[U-Boot] Enabling uart 3 in arndale

[armdev]

Dear Tomasz,

On 16-Mar-2014, at 6:23 pm, Tomasz Figa <tomasz.figa@gmail.com> wrote:

> Hi,
> 
> On 14.03.2014 09:04, armdev wrote:
>> Hi,
>> 
>> We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD and TXD are on pins 2 and 4 which as per the base board specification is connected as
>> 
>> XuRXD3 : UART_3_RXD/GPA1[4] : 2
>> XuTXD3 : UART_3_TXD/GPA1[5] : 4
>> 
>> As per the public reference manual of exynos 5250, there is a register GPACON (0x1140_0000)
>> Setting GPACON |= 0x0010_0000 should enable the pins, but I am not able to see any output on UART3.
>> 
>> Can you please suggest what is the right procedure
> 
> The register is GPA1CON and its GPA1CON[4] and [5] bit fields need both to be set to 0x2 - see Pad Control chapter of Exynos5250 public datasheet. Also GPA1PUD should be reconfigured to disable default pull-down on both pins, again you can find details of the register in the datasheet.
> 
> Best regards,
> Tomasz

Based on the steps provided, we are still not able to get some output on UART3 simultaneously with UART2.
Can you please help us find out what we are missing.

On the current u-boot, Following was the observation and steps to enable UART3 on arndale

Observations / Questions
??????????????
a) The board has the default UART set to UART2 which is at 0x12c20000, while the include/configs/arndale.h has the UART_OFFSET set to 0x010000.
Shouldn?t it be set to 0x20000 ?

b) board_uart_init in board/samsung/arndale/arndale.c is configuring all the uarts, 
Clocks would be set properly for all 4 uarts ?

Steps / Code Modified
??????????????
a) GPAICON[4] and [5] set to 0x2 in board/samsung/arndale/arndale.c
b) GPA1PUD [4] and [5] set to 0.

diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 9efc355..4fb291e 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -102,12 +102,18 @@ static int board_uart_init(void)
 int board_early_init_f(void)
 {
 	int err;
-
+	volatile unsigned int *gpa1con = (volatile unsigned int *)0x11400020;
+	volatile unsigned int *gpa1pud = (volatile unsigned int *)0x11400028;
 	err = board_uart_init();
 	if (err) {
 		debug("UART init failed\n");
 		return err;
 	}
+	serial_init_dev(2);
+	serial_setbrg_dev(2);
+	*gpa1con |= 0x00220000;	
+	*gpa1pud &= 0xfffff0ff;	
+
 	return err;
 }
 #endif

[U-Boot] Enabling uart 3 in arndale

[armdev]

Dear tomaz

Waiting for your reply... 

On 28-Mar-2014, at 3:12 pm, armdev <armdev.ftm@gmail.com> wrote:

> Dear Tomasz,
> 
> On 16-Mar-2014, at 6:23 pm, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> 
>> Hi,
>> 
>> On 14.03.2014 09:04, armdev wrote:
>>> Hi,
>>> 
>>> We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD and TXD are on pins 2 and 4 which as per the base board specification is connected as
>>> 
>>> XuRXD3 : UART_3_RXD/GPA1[4] : 2
>>> XuTXD3 : UART_3_TXD/GPA1[5] : 4
>>> 
>>> As per the public reference manual of exynos 5250, there is a register GPACON (0x1140_0000)
>>> Setting GPACON |= 0x0010_0000 should enable the pins, but I am not able to see any output on UART3.
>>> 
>>> Can you please suggest what is the right procedure
>> 
>> The register is GPA1CON and its GPA1CON[4] and [5] bit fields need both to be set to 0x2 - see Pad Control chapter of Exynos5250 public datasheet. Also GPA1PUD should be reconfigured to disable default pull-down on both pins, again you can find details of the register in the datasheet.
>> 
>> Best regards,
>> Tomasz
> 
> Based on the steps provided, we are still not able to get some output on UART3 simultaneously with UART2.
> Can you please help us find out what we are missing.
> 
> On the current u-boot, Following was the observation and steps to enable UART3 on arndale
> 
> Observations / Questions
> ??????????????
> a) The board has the default UART set to UART2 which is at 0x12c20000, while the include/configs/arndale.h has the UART_OFFSET set to 0x010000.
> Shouldn?t it be set to 0x20000 ?
> 
> b) board_uart_init in board/samsung/arndale/arndale.c is configuring all the uarts, 
> Clocks would be set properly for all 4 uarts ?
> 
> Steps / Code Modified
> ??????????????
> a) GPAICON[4] and [5] set to 0x2 in board/samsung/arndale/arndale.c
> b) GPA1PUD [4] and [5] set to 0.
> 
> diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
> index 9efc355..4fb291e 100644
> --- a/board/samsung/arndale/arndale.c
> +++ b/board/samsung/arndale/arndale.c
> @@ -102,12 +102,18 @@ static int board_uart_init(void)
> int board_early_init_f(void)
> {
>  	int err;
> -
> +	volatile unsigned int *gpa1con = (volatile unsigned int *)0x11400020;
> +	volatile unsigned int *gpa1pud = (volatile unsigned int *)0x11400028;
>  	err = board_uart_init();
>  	if (err) {
>  		debug("UART init failed\n");
>  		return err;
>  	}
> +	serial_init_dev(2);
> +	serial_setbrg_dev(2);
> +	*gpa1con |= 0x00220000;	
> +	*gpa1pud &= 0xfffff0ff;	
> +
>  	return err;
> }
> #endif
>