From mboxrd@z Thu Jan 1 00:00:00 1970 From: Przemyslaw Marczak Date: Tue, 25 Mar 2014 08:38:33 +0100 Subject: [U-Boot] [PATCH v4 2/4] cpu: exynos4: add ace sha base address In-Reply-To: <5330DB36.3060906@samsung.com> References: <1395336225-21296-1-git-send-email-p.marczak@samsung.com> <1395392180-11918-1-git-send-email-p.marczak@samsung.com> <1395392180-11918-2-git-send-email-p.marczak@samsung.com> <532FE24A.1000305@samsung.com> <5330DB36.3060906@samsung.com> Message-ID: <53313279.7040607@samsung.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello Minkyu, On 03/25/2014 02:26 AM, Minkyu Kang wrote: > On 24/03/14 16:44, Przemyslaw Marczak wrote: >> Hello Minkyu, >> >> On 03/22/2014 04:18 PM, Minkyu Kang wrote: >>> Dear Przemyslaw Marczak, >>> >>> >>> On 21 March 2014 17:56, Przemyslaw Marczak wrote: >>> >>>> Signed-off-by: Przemyslaw Marczak >>>> Cc: Minkyu Kang >>>> >>>> --- >>>> Changes v3: >>>> - new commit - after separate changes from next commit >>>> >>>> Changes v4: >>>> - none >>>> --- >>>> arch/arm/include/asm/arch-exynos/cpu.h | 4 ++-- >>>> 1 file changed, 2 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/arch/arm/include/asm/arch-exynos/cpu.h >>>> b/arch/arm/include/asm/arch-exynos/cpu.h >>>> index bccce63..bd3300a 100644 >>>> --- a/arch/arm/include/asm/arch-exynos/cpu.h >>>> +++ b/arch/arm/include/asm/arch-exynos/cpu.h >>>> @@ -44,11 +44,11 @@ >>>> #define EXYNOS4_MODEM_BASE 0x13A00000 >>>> #define EXYNOS4_USBPHY_CONTROL 0x10020704 >>>> #define EXYNOS4_I2S_BASE 0xE2100000 >>>> +#define EXYNOS4_ACE_SFR_BASE 0x10830000 >>>> >>> >>> Could you please align this list? >>> >>> >> >> I am not sure why this is not aligned in patch - it was generated by "git format patch". The source was aligned and after apply this patch by "git am" the code is also aligned. > > hm, sorry to misunderstanding. > It means the ordering. > I want to keep ordering of this list by base address. (although it looks already broken) > > #define EXYNOS4_DMC_CTRL_BASE 0x10400000 > +#define EXYNOS4_ACE_SFR_BASE 0x10830000 > #define EXYNOS4_GPIO_PART2_BASE 0x11000000 > > Thanks, > Minkyu Kang. > ok, I will move those lines for proper address order. Thanks -- Przemyslaw Marczak Samsung R&D Institute Poland Samsung Electronics p.marczak at samsung.com