From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jaehoon Chung Date: Thu, 27 Mar 2014 17:54:33 +0900 Subject: [U-Boot] [PATCH 0/9] mmc: code cleanup and support DDR mode Message-ID: <5333E749.9040808@samsung.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de If card and host are supported DDR mode, then it can be used the DDR mode. This patch-set has dependency about beomho's patch-set. (Based-on u-boot-samsung repository) http://patchwork.ozlabs.org/patch/331986/ http://patchwork.ozlabs.org/patch/331987/ http://patchwork.ozlabs.org/patch/331989/ http://patchwork.ozlabs.org/patch/331988/ It's result for loading uImage. sdhci controller ->5260488 bytes read in 259 ms (19.4 MiB/s) dwmmc controller without DDR mode -> 5260488 bytes read in 202 ms (24.8 MiB/s) dwmmc controller with DDR mode -> 5260488 bytes read in 118 ms (42.5 MiB/s) Jaehoon Chung (9): mmc: s5p_sdhci: add the s5p_sdhci_core_init function ARM: exynos: board: change the mmc/sd init sequence ARM: exynos: clock: modify the set_mmc_clk for exynos4 mmc: exynos_dw_mmc: restore the property into host mmc: remove the unnecessary define and fix the wrong bit control mmc: support the DDR mode for eMMC mmc: dw_mmc: support the DDR mode ARM: dts: exnyos: enable dw-mmc controller mmc: exynos_dw_mmc: enable the DDR mode arch/arm/cpu/armv7/exynos/clock.c | 16 ++- arch/arm/dts/exynos4412-trats2.dts | 6 +- board/samsung/common/board.c | 13 +-- drivers/mmc/dw_mmc.c | 10 +- drivers/mmc/exynos_dw_mmc.c | 215 ++++++++++++++++++++++-------------- drivers/mmc/mmc.c | 15 ++- drivers/mmc/s5p_sdhci.c | 43 +++----- include/dwmmc.h | 2 + include/mmc.h | 25 +++-- 10 files changed, 214 insertions(+), 134 deletions(-) -- 1.7.9.5