From mboxrd@z Thu Jan  1 00:00:00 1970
From: Nikita Kiryanov <nikita@compulab.co.il>
Date: Wed, 09 Apr 2014 17:55:17 +0300
Subject: [U-Boot] [PATCH 04/11] MX6: add common SPL configuration
In-Reply-To: <1396504871-1454-5-git-send-email-tharvey@gateworks.com>
References: <1396504871-1454-1-git-send-email-tharvey@gateworks.com>
	<1396504871-1454-5-git-send-email-tharvey@gateworks.com>
Message-ID: <53455F55.1090208@compulab.co.il>
List-Id: <u-boot.lists.denx.de>
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To: u-boot@lists.denx.de

Hi Tim,

On 04/03/2014 09:01 AM, Tim Harvey wrote:> Add a common header which can 
hopefully be shared among imx6 SPL users
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>   include/configs/imx6_spl.h | 64
++++++++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 64 insertions(+)
>   create mode 100644 include/configs/imx6_spl.h
>
> diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h
> new file mode 100644
> index 0000000..f9bdf55
> --- /dev/null
> +++ b/include/configs/imx6_spl.h
> @@ -0,0 +1,64 @@
> +/*
> + * Author: Tim Harvey <tharvey@gateworks.com>
> + *
> + * SPDX-License-Identifier:     GPL-2.0+
> + */
> +#ifndef __IMX6_SPL_CONFIG_H
> +#define __IMX6_SPL_CONFIG_H
> +
> +#ifdef CONFIG_SPL
> +
> +#define CONFIG_SPL_FRAMEWORK
> +
> +/*
> + * IMX6 OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF

That's not true for all IMX6 SoCs. On i.MX6 Solo and DualLite it's
0x00907000 to 0x0091FFFF.

> + *  - we start at 0x00908000 so as to leave some room for IVT/DCD
> + *  - recommended stack (from IMX6DQRM Figure 8-3) is at 0x0093FFB8
> + *  - this leaves about 224K for SPL image and stack
> + */
> +#define CONFIG_SPL_LDSCRIPT		"arch/arm/cpu/armv7/mx6/u-boot-spl.lds"
> +#define CONFIG_SPL_TEXT_BASE		0x00908000
> +#define CONFIG_SPL_MAX_SIZE		(128 * 1024)

This should be a smaller value if we want this config to apply for
i.MX6 Solo and DualLite, which have a 68KB OCRAM free area.

> +#define CONFIG_SPL_START_S_PATH		"arch/arm/cpu/armv7"
> +#define CONFIG_SPL_STACK		0x0093FFB8

For i.MX6 Solo and DualLite this address should be lower (recommended
address is 0x0091FFB8).

> +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define CONFIG_SPL_LIBGENERIC_SUPPORT
> +#define CONFIG_SPL_SERIAL_SUPPORT
> +#define CONFIG_SPL_I2C_SUPPORT
> +#define CONFIG_SPL_GPIO_SUPPORT
> +
> +/* NAND support */
> +#if defined(CONFIG_SPL_NAND_SUPPORT)
> +#define CONFIG_SPL_NAND_MXS
> +#define CONFIG_SPL_NAND_BASE
> +#define CONFIG_SPL_DMA_SUPPORT
> +#endif


-- 
Regards,
Nikita.