From mboxrd@z Thu Jan 1 00:00:00 1970 From: Igor Grinberg Date: Thu, 24 Apr 2014 10:07:41 +0300 Subject: [U-Boot] [PATCH 07/11] MX6: use macro building for MX6Q/MX6DL iomux regs In-Reply-To: <53580DD9.3090707@boundarydevices.com> References: <1396504871-1454-1-git-send-email-tharvey@gateworks.com> <1396504871-1454-8-git-send-email-tharvey@gateworks.com> <53455FDA.3020301@compulab.co.il> <5346A5F4.3020308@compulab.co.il> <5357F36F.9060702@denx.de> <53580DD9.3090707@boundarydevices.com> Message-ID: <5358B83D.2030807@compulab.co.il> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 04/23/14 22:00, Eric Nelson wrote: > Hi Stefano, > > On 04/23/2014 10:07 AM, Stefano Babic wrote: >> Hi Tim, hi Nikita, >> >> On 10/04/2014 16:08, Nikita Kiryanov wrote: >> >>>> The cfg files are currently all written to use the IOMUX register >>>> names as MX6_ (no Q vs DL) so that a single cfg file can be used for a >>>> build-time configuration of IMX6Q or IMX6DL. >>> >>> OK now I understand. It seems to me that you only have this problem >>> because you are using these address #defines as values for >>> mx6_mmdc_ioregs structs to define a register mapping. You can >>> also define this mapping by using a struct template that matches the >>> register layout and a base address, both of which change between CPU >>> types. >>> >> >> Reason to do in this way is the thought that the layout among the >> processsors can be completely different, thing that for other area is >> also true. >> >> This was discussed also in a previous RFC by Eric: >> >> http://lists.denx.de/pipermail/u-boot/2013-November/166665.html >> >> Tim, what about to repost in your patchset Eric's patch ? It completes >> your patchset and add documentation that is now missing (added Eric in >> CC if he will complain about this..) >> > > I have no problem with this, but when I did some follow-on work to > bring up SPL on Nitrogen6x boards, I recall finding some bugs in > that patch set. > > I didn't follow up with updates because I ran into some other > snags. In particular, our use of SPI-NOR makes it crucial that > we be able to download a secondary U-Boot over USB. > >> However, if we can recognize the same layout for all three variations (I >> have only check some registers in 6Q and 6DL layout), using the same >> structure with a different base address can be even more readable. I >> admit I have not checked deeply, but it seems at first glance that >> mx6dq_ctrl and mx6sdl_ctrl in 7/11 share the same layout. >> > > There's a lot of commonality, but a quick diff of arch-mx6/mx6q-ddr.h > and arch-mx6/mx6dl-ddr.h will show the problem areas. > >>> You can find an example of this in the Wandboard SPL implementation. >>> It's not in mainline ATM so you'll have to download their BSP. >>> The template + base addr method also doesn't use up additional memory >>> to define this layout, which is a point in its favor. >> >> If the layout is exactly the same, you could make the structure >> available to all imx6 flavors. >> > > Unfortunately, I don't believe it is. I also, remember it is not. What Tim says actually makes sense, if layout is not the same, define two structs and choose the right one in runtime. -- Regards, Igor.