[U-Boot] Getting started with SPL

[U-Boot] Getting started with SPL

[Heshsham Abdul Basit]

*HI, *


*OS:* petalinux <https://github.com/Xilinx/u-boot-xlnx/tree/master-next>

*Board:* Xilinx z702 evaluation
board<http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm>
having
ARM Cortex A9 and FPGA on the zc700 SoC

* Background:* I observed that first message on the console comes after 1
second. It is the message from u-boot. Why this was happening? Because I
had to use a fsbl (first stage boot
loader)<http://blog.fakultaet-technik.de/development-with-zynq-part-3-build-boot-files/>
for
initialization of hardware. I suspected that it is this fsbl that is
consuming 1 second initializing useless hardware which I will not use at
all. in fact I am not going to use any fpga bitstream also.

So I am trying to boot my Linux image using uboot-SPL
method<http://www.denx.de/en/pub/Documents/Presentations/EWC2012_Roeder_Zundel_Fastboot.pdf>
bypassing
fsbl.

The main advantage I can get is perhaps fastest possible boot.

I found this<https://github.com/Xilinx/u-boot-xlnx/blob/master/doc/README.SPL>
(README.SPL) document
that explains how to work with SPL. However I have following question w.r.t
to the this passage in the document:

The building of SPL images can be with:
define CONFIG_SPL

Because SPL images normally have a different text base, one has to be
configured by defining CONFIG_SPL_TEXT_BASE. The linker script has to be
defined with CONFIG_SPL_LDSCRIPT.

Questions:

1- In which file I should define #define CONFIG_SPL and
CONFIG_SPL_TEXT_BASE?

2-Where is the linker script? Do I need to define CONFIG_SPL_LDSCRIPT in
the linker script ?
Source code of SPL enabled u-boot for xilinx board I am using is
this<https://github.com/Xilinx/u-boot-xlnx/tree/master-next>

This is the first time I am trying to play with SPL so kindly help me
proceed.

Thanks and regards,

HB

[U-Boot] Getting started with SPL

[Michal Simek]

Hi

On 04/30/2014 11:32 AM, Heshsham Abdul Basit wrote:
> *HI, *
> 
> 
> *OS:* petalinux <https://github.com/Xilinx/u-boot-xlnx/tree/master-next>

it is not OS - it is just xilinx u-boot repo. And petalinux is using
this repo too.

> 
> *Board:* Xilinx z702 evaluation
> board<http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm>
> having
> ARM Cortex A9 and FPGA on the zc700 SoC
> 
> * Background:* I observed that first message on the console comes after 1
> second. It is the message from u-boot. Why this was happening? Because I
> had to use a fsbl (first stage boot
> loader)<http://blog.fakultaet-technik.de/development-with-zynq-part-3-build-boot-files/>
> for
> initialization of hardware. I suspected that it is this fsbl that is
> consuming 1 second initializing useless hardware which I will not use at
> all. in fact I am not going to use any fpga bitstream also.

In standard flow there is bootrom -> fsbl -> u-boot.
I have never measured where we are spending time in boot.

> So I am trying to boot my Linux image using uboot-SPL
> method<http://www.denx.de/en/pub/Documents/Presentations/EWC2012_Roeder_Zundel_Fastboot.pdf>
> bypassing
> fsbl.
> 
> The main advantage I can get is perhaps fastest possible boot.

yes. But also keep in your mind that depends on which boot device you are using.
QSPI mode should be the fastest one.

> 
> I found this<https://github.com/Xilinx/u-boot-xlnx/blob/master/doc/README.SPL>
> (README.SPL) document
> that explains how to work with SPL. However I have following question w.r.t
> to the this passage in the document:
> 
> The building of SPL images can be with:
> define CONFIG_SPL
> 
> Because SPL images normally have a different text base, one has to be
> configured by defining CONFIG_SPL_TEXT_BASE. The linker script has to be
> defined with CONFIG_SPL_LDSCRIPT.
> 
> Questions:
> 
> 1- In which file I should define #define CONFIG_SPL and
> CONFIG_SPL_TEXT_BASE?

Just config file - you can just grep code and you will find out that it is
in include/configs/ folder.

> 
> 2-Where is the linker script? Do I need to define CONFIG_SPL_LDSCRIPT in
> the linker script ?

If you want to use private linker script then yes. There is also generic one.

> Source code of SPL enabled u-boot for xilinx board I am using is
> this<https://github.com/Xilinx/u-boot-xlnx/tree/master-next>

yes. I have enabled it by default but for correct function you have to copy
ps7_init.c/h files from your hardware design to be align with your hw design

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 263 bytes
Desc: OpenPGP digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20140430/ca5a4636/attachment.pgp>

[U-Boot] Getting started with SPL

[Heshsham Abdul Basit]

HI Michal.

Thanks for your answers. I have few related questions which I will ask
separately.

Rgrds,

Heshsham



On 30/04/2014, Michal Simek <monstr@monstr.eu> wrote:
> Hi
>
> On 04/30/2014 11:32 AM, Heshsham Abdul Basit wrote:
>> *HI, *
>>
>>
>> *OS:* petalinux <https://github.com/Xilinx/u-boot-xlnx/tree/master-next>
>
> it is not OS - it is just xilinx u-boot repo. And petalinux is using
> this repo too.
>
>>
>> *Board:* Xilinx z702 evaluation
>> board<http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm>
>> having
>> ARM Cortex A9 and FPGA on the zc700 SoC
>>
>> * Background:* I observed that first message on the console comes after 1
>> second. It is the message from u-boot. Why this was happening? Because I
>> had to use a fsbl (first stage boot
>> loader)<http://blog.fakultaet-technik.de/development-with-zynq-part-3-build-boot-files/>
>> for
>> initialization of hardware. I suspected that it is this fsbl that is
>> consuming 1 second initializing useless hardware which I will not use at
>> all. in fact I am not going to use any fpga bitstream also.
>
> In standard flow there is bootrom -> fsbl -> u-boot.
> I have never measured where we are spending time in boot.
>
>> So I am trying to boot my Linux image using uboot-SPL
>> method<http://www.denx.de/en/pub/Documents/Presentations/EWC2012_Roeder_Zundel_Fastboot.pdf>
>> bypassing
>> fsbl.
>>
>> The main advantage I can get is perhaps fastest possible boot.
>
> yes. But also keep in your mind that depends on which boot device you are
> using.
> QSPI mode should be the fastest one.
>
>>
>> I found
>> this<https://github.com/Xilinx/u-boot-xlnx/blob/master/doc/README.SPL>
>> (README.SPL) document
>> that explains how to work with SPL. However I have following question
>> w.r.t
>> to the this passage in the document:
>>
>> The building of SPL images can be with:
>> define CONFIG_SPL
>>
>> Because SPL images normally have a different text base, one has to be
>> configured by defining CONFIG_SPL_TEXT_BASE. The linker script has to be
>> defined with CONFIG_SPL_LDSCRIPT.
>>
>> Questions:
>>
>> 1- In which file I should define #define CONFIG_SPL and
>> CONFIG_SPL_TEXT_BASE?
>
> Just config file - you can just grep code and you will find out that it is
> in include/configs/ folder.
>
>>
>> 2-Where is the linker script? Do I need to define CONFIG_SPL_LDSCRIPT in
>> the linker script ?
>
> If you want to use private linker script then yes. There is also generic
> one.
>
>> Source code of SPL enabled u-boot for xilinx board I am using is
>> this<https://github.com/Xilinx/u-boot-xlnx/tree/master-next>
>
> yes. I have enabled it by default but for correct function you have to copy
> ps7_init.c/h files from your hardware design to be align with your hw
> design
>
> Thanks,
> Michal
>
>
> --
> Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
> w: www.monstr.eu p: +42-0-721842854
> Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
> Maintainer of Linux kernel - Xilinx Zynq ARM architecture
> Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
>
>
>