[U-Boot] imximage: MAX_HW_CFG_SIZE_V2 too small for i.MX6D?

[U-Boot] imximage: MAX_HW_CFG_SIZE_V2 too small for i.MX6D?

[Arne Rovet]

MAX_HW_CFG_SIZE_V2 is defined as 121 in tools/imximage.h, but I think
the processor reference manual implies it can be larger (i.MX
6Dual/6Quad Applications Processor Reference Manual, Rev. 1, 04/2013).

In the section labelled "8.6.2 Device Configuration Data (DCD)" it
says the DCD can be a maximum of 1768 bytes:
"The maximum size of the DCD limited to 1768 bytes."

Have I misunderstood the link between the DCD size and
MAX_HW_CFG_SIZE_V2? If so, where did the value of 121 for
MAX_HW_CFG_SIZE_V2 come from?

[U-Boot] imximage: MAX_HW_CFG_SIZE_V2 too small for i.MX6D?

[Stefano Babic]

Hi Arne,

On 14/05/2014 06:07, Arne Rovet wrote:
> MAX_HW_CFG_SIZE_V2 is defined as 121 in tools/imximage.h, but I think
> the processor reference manual implies it can be larger (i.MX
> 6Dual/6Quad Applications Processor Reference Manual, Rev. 1, 04/2013).
> 
> In the section labelled "8.6.2 Device Configuration Data (DCD)" it
> says the DCD can be a maximum of 1768 bytes:
> "The maximum size of the DCD limited to 1768 bytes."

It is the same for MX53 - header V2 is valid for i.MX6 and also for i.MX53.

> 
> Have I misunderstood the link between the DCD size and
> MAX_HW_CFG_SIZE_V2? If so, where did the value of 121 for
> MAX_HW_CFG_SIZE_V2 come from?

I cannot answer this question. But even if the DCD can be longer, there
is an initial load region size that is differnet (table 7-26 on i.MX53
manual, table 8-26 on i.MX6Q manual). For example, on SD the i-MX53
loads up 2KB, the i.MX6Q 4KB. The whole header must fit in the initial
load region.

The main question is also if a large DCD table is needed. The DCD is
supposed in U-Boot to set up the minimal requirement to let the
processor to copy the u-boot image into RAM - the rest can be done in
U-Boot code after the boot ROM has completed its job.

Best regards,
Stefano Babic


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[U-Boot] imximage: MAX_HW_CFG_SIZE_V2 too small for i.MX6D?

[Arne Rovet]

Hi Stefano,

On 14 May 2014 18:18, Stefano Babic <sbabic@denx.de> wrote:
> The main question is also if a large DCD table is needed. The DCD is
> supposed in U-Boot to set up the minimal requirement to let the
> processor to copy the u-boot image into RAM ....

The register setup for the RAM we use on our iMX6D board exceeded the
maximum 121 entries. It is a 2GByte lpddr2, arranged to use both MMDC
channels on the processor. I blindly used the register sequence
generated by the tool "i.Mx6DQSDL LPDDR2 Script Aid" provided by
freescale.

> - the rest can be done in
> U-Boot code after the boot ROM has completed its job.
Maybe the strategy for my board is to setup one channel only in DCD,
then the rest in uboot?  But, I wonder if this strategy would work for
the iMX6D "4KB-interleave" ddr memory mapping mode we intend to use?
Currently we use the "fixed"/flat memory mapping...

Regards,
Arne.