[U-Boot] ARM: zynq: sdhci clock frequency init question

[Michal Simek <monstr@monstr.eu>]

On 05/12/2014 08:48 PM, Krunal Desai wrote:
>> From: Michal Simek [mailto:monstr AT monstr.eu]
>> Sent: Wednesday, May 07, 2014 04:46
>> To: Krunal Desai; u-boot AT lists.denx.de
>> Subject: Re: [U-Boot] ARM: zynq: sdhci clock frequency init question
>>
>> we didn't test this configuration that's why 52MHz is there as default case.
>> I think that should be easily possible to detect MIO setting as we are 
>> doing for qspi/nand/usb.
> 
> (Trying again due to base64-oddness with Outlook)
> 
> Thanks for the reply Michal; that sounds very sane to me. To be clear, you'd basically read the MIO configuration registers to see whether SD is active on MIO, and if not, assume EMIO? (Or not used?)
> 	 
>> We have this code in our xilinx repository and I have sent patches for 
>> mainline review
>> 2 weeks ago or something like that.
>> I haven't got any NACK and I am going to send pull request to ARM 
>> custodian when I fix fpga patches.
> 
> Looking forward to seeing it, thanks for following up!

Sorry for delay.
I have sent pull request to Albert

http://git.denx.de/?p=u-boot/u-boot-microblaze.git;a=shortlog;h=refs/heads/zynq
but here is the code we are talking about.
ARM: zynq: Add MIO detection code

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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