From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bo Shen <voice.shen@atmel.com>
Date: Mon, 19 May 2014 16:09:43 +0800
Subject: [U-Boot] [PATCH v2 2/3] arm:at91: enable ROM loadable atmel
	image
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	<537976DA.5070508@atmel.com> <5379B738.6080800@gmail.com>
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Hi Andreas,

On 05/19/2014 03:48 PM, Andreas Bie?mann wrote:
> Hi Bo,
>
> On 05/19/2014 05:13 AM, Bo Shen wrote:
>> On 05/16/2014 05:59 PM, Andreas Bie?mann wrote:
>>> For sama5d3xek we need to modify the SPL image for correct detection
>>> by ROM
>>> code.
>>>
>>> Signed-off-by: Andreas Bie?mann <andreas.devel@googlemail.com>
>>> ---
>>>
>>> Changes in v2:
>>> * add -n switch to mkimage for PMECC type NAND and CONFIG_SYS_NANDFLASH
>>>
>>>    arch/arm/cpu/armv7/at91/config.mk |   10 ++++++++++
>>>    doc/README.atmel_pmecc            |   30 ++++++++++++++++++++++++++++++
>>>    spl/Makefile                      |   18 ++++++++++++++++++
>>>    3 files changed, 58 insertions(+)
>>>    create mode 100644 arch/arm/cpu/armv7/at91/config.mk
>>>
>
>>> diff --git a/doc/README.atmel_pmecc b/doc/README.atmel_pmecc
>>> index cf8373b..5a93123 100644
>>> --- a/doc/README.atmel_pmecc
>>> +++ b/doc/README.atmel_pmecc
>>> @@ -27,3 +27,33 @@ Take AT91SAM9X5EK as an example, the board
>>> definition file likes:
>>>    #define CONFIG_ATMEL_NAND_HW_PMECC    1
>>>    #define CONFIG_PMECC_CAP        2
>>>    #define CONFIG_PMECC_SECTOR_SIZE    512
>>> +
>>> +How to enable PMECC header for direct programmable boot.bin
>>> +-----------------------------------------------------------
>>> +2014-05-15 Andreas Bie?mann <andreas.devel@googlemail.com>
>>> +
>>> +The usual way to program SPL into NAND flash is to use the SAM-BA
>>> Atmel tool.
>>> +This however is often not usable when doing field updates. To be able to
>>> +program a SPL binary into NAND flash we need to add the PMECC header
>>> to the
>>> +binary before. Chapter '12.4.4.1 NAND Flash Boot: NAND Flash
>>> Detection' in
>>> +sama5d3 SoC spec (as of 03. April 2014). We have a new image type
>>> added to
>>> +mkimage to generate this PMECC header and integrated into the build
>>> process of
>>> +SPL.
>>> +The required parameters in board configuration header are as follows:
>>> +
>>> +This example is working for sama5d3xek:
>>> +
>>> +#define CONFIG_SPL_AT91_HEADER_USE_PMECC    1
>>> +#define CONFIG_SPL_AT91_HEADER_SECTOR_PER_PAGE    4
>>> +#define CONFIG_SPL_AT91_HEADER_SECTOR_SIZE    CONFIG_PMECC_SECTOR_SIZE
>>> +#define CONFIG_SPL_AT91_HEADER_SPARE_SIZE    64
>>> +#define CONFIG_SPL_AT91_HEADER_ECC_BITS        CONFIG_PMECC_CAP
>>> +#define CONFIG_SPL_AT91_HEADER_ECC_OFFSET    36
>>
>> Just a nitpick here:
>>
>> Can we take this parameter from the existing definition while not use
>> new definition? Or else, if the header using different parameter with
>> what u-boot nand driver use, then if flash through u-boot, it won't boot.
>
> I used the two parameters I found, sorry the rest isn't defiend anywhere
> (or I can't find). Can you give me pointers to the other parameters?

Can we use the following information?

CONFIG_SPL_AT91_HEADER_USE_PMECC: CONFIG_ATMEL_NAND_HW_PMECC

CONFIG_SPL_AT91_HEADER_SECTOR_PER_PAGE: CONFIG_SYS_NAND_PAGE_SIZE / 
CONFIG_PMECC_SECTOR_SIZE

CONFIG_SPL_AT91_HEADER_SPARE_SIZE: CONFIG_SYS_NAND_OOBSIZE

CONFIG_SPL_AT91_HEADER_ECC_OFFSET: this need a little bit more 
calculation. take 4 bits (caps = 4) as an example:

ecc_offset = oob_size - ((12 + sector_size / 512) * caps + 7) /8
= 64 - ((12 + 512 / 512) * 4 + 7) / 8 = 36.
I am not sure this is worthwhile.

Best Regards,
Bo Shen