* [U-Boot] [U-Boot PATCH 1/5] ARM: DRA72x: Add Silicon ID support
2014-05-15 5:38 [U-Boot] [U-Boot PATCH 0/5] ARM: DRA72x: Add support for DRA72x SoC Lokesh Vutla
@ 2014-05-15 5:38 ` Lokesh Vutla
2014-05-23 23:49 ` [U-Boot] [U-Boot, U-Boot, " Tom Rini
2014-05-15 5:38 ` [U-Boot] [U-Boot PATCH 2/5] ARM: DRA72x: volt: Update the pmic offsets Lokesh Vutla
` (4 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Lokesh Vutla @ 2014-05-15 5:38 UTC (permalink / raw)
To: u-boot
Add silicon ID code for DRA722 silicon.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tom Rini <trini@ti.com>
---
arch/arm/cpu/armv7/omap5/hwinit.c | 3 +++
arch/arm/include/asm/arch-omap5/omap.h | 1 +
arch/arm/include/asm/omap_common.h | 1 +
3 files changed, 5 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index 93feb16..a8a474a 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -336,6 +336,9 @@ void init_omap_revision(void)
case DRA752_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = DRA752_ES1_1;
break;
+ case DRA722_CONTROL_ID_CODE_ES1_0:
+ *omap_si_rev = DRA722_ES1_0;
+ break;
default:
*omap_si_rev = OMAP5430_SILICON_ID_INVALID;
}
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 19fdece..4407e72 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -45,6 +45,7 @@
#define OMAP5432_CONTROL_ID_CODE_ES2_0 0x1B99802F
#define DRA752_CONTROL_ID_CODE_ES1_0 0x0B99002F
#define DRA752_CONTROL_ID_CODE_ES1_1 0x1B99002F
+#define DRA722_CONTROL_ID_CODE_ES1_0 0x0B9BC02F
/* UART */
#define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000)
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 729723a..d1dd4b5 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -645,6 +645,7 @@ static inline u8 is_dra7xx(void)
/* DRA7XX */
#define DRA752_ES1_0 0x07520100
#define DRA752_ES1_1 0x07520110
+#define DRA722_ES1_0 0x07220100
/*
* SRAM scratch space entries
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [U-Boot PATCH 2/5] ARM: DRA72x: volt: Update the pmic offsets
2014-05-15 5:38 [U-Boot] [U-Boot PATCH 0/5] ARM: DRA72x: Add support for DRA72x SoC Lokesh Vutla
2014-05-15 5:38 ` [U-Boot] [U-Boot PATCH 1/5] ARM: DRA72x: Add Silicon ID support Lokesh Vutla
@ 2014-05-15 5:38 ` Lokesh Vutla
2014-05-23 23:50 ` [U-Boot] [U-Boot, U-Boot, " Tom Rini
2014-05-15 5:38 ` [U-Boot] [U-Boot PATCH 3/5] ARM: DRA72x: clocks: Update the hwdata Lokesh Vutla
` (3 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Lokesh Vutla @ 2014-05-15 5:38 UTC (permalink / raw)
To: u-boot
From: Keerthy <j-keerthy@ti.com>
TPS65917 is used in DRA722 evm. Update the address offsets accordingly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Tom Rini <trini@ti.com>
---
arch/arm/cpu/armv7/omap5/hw_data.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index ad97132..802b155 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -372,6 +372,38 @@ struct vcores_data dra752_volts = {
.iva.pmic = &tps659038,
};
+struct vcores_data dra722_volts = {
+ .mpu.value = 1000,
+ .mpu.efuse.reg = STD_FUSE_OPP_VMIN_MPU_NOM,
+ .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+ .mpu.addr = 0x23,
+ .mpu.pmic = &tps659038,
+
+ .eve.value = 1000,
+ .eve.efuse.reg = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
+ .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+ .eve.addr = 0x2f,
+ .eve.pmic = &tps659038,
+
+ .gpu.value = 1000,
+ .gpu.efuse.reg = STD_FUSE_OPP_VMIN_GPU_NOM,
+ .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+ .gpu.addr = 0x2f,
+ .gpu.pmic = &tps659038,
+
+ .core.value = 1000,
+ .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE_NOM,
+ .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+ .core.addr = 0x27,
+ .core.pmic = &tps659038,
+
+ .iva.value = 1000,
+ .iva.efuse.reg = STD_FUSE_OPP_VMIN_IVA_NOM,
+ .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+ .iva.addr = 0x2f,
+ .iva.pmic = &tps659038,
+};
+
/*
* Enable essential clock domains, modules and
* do some additional special settings needed
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [U-Boot PATCH 3/5] ARM: DRA72x: clocks: Update the hwdata
2014-05-15 5:38 [U-Boot] [U-Boot PATCH 0/5] ARM: DRA72x: Add support for DRA72x SoC Lokesh Vutla
2014-05-15 5:38 ` [U-Boot] [U-Boot PATCH 1/5] ARM: DRA72x: Add Silicon ID support Lokesh Vutla
2014-05-15 5:38 ` [U-Boot] [U-Boot PATCH 2/5] ARM: DRA72x: volt: Update the pmic offsets Lokesh Vutla
@ 2014-05-15 5:38 ` Lokesh Vutla
2014-05-23 23:50 ` [U-Boot] [U-Boot, U-Boot, " Tom Rini
2014-05-15 5:38 ` [U-Boot] [U-Boot PATCH 4/5] ARM: DRA72x: Update EMIF data Lokesh Vutla
` (2 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Lokesh Vutla @ 2014-05-15 5:38 UTC (permalink / raw)
To: u-boot
Adding the prcm, dplls, control module hooks for DRA72x.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tom Rini <trini@ti.com>
---
arch/arm/cpu/armv7/omap5/hw_data.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 802b155..1a6798d 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -590,6 +590,13 @@ void hw_data_init(void)
*ctrl = &dra7xx_ctrl;
break;
+ case DRA722_ES1_0:
+ *prcm = &dra7xx_prcm;
+ *dplls_data = &dra7xx_dplls;
+ *omap_vcores = &dra722_volts;
+ *ctrl = &dra7xx_ctrl;
+ break;
+
default:
printf("\n INVALID OMAP REVISION ");
}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [U-Boot PATCH 4/5] ARM: DRA72x: Update EMIF data
2014-05-15 5:38 [U-Boot] [U-Boot PATCH 0/5] ARM: DRA72x: Add support for DRA72x SoC Lokesh Vutla
` (2 preceding siblings ...)
2014-05-15 5:38 ` [U-Boot] [U-Boot PATCH 3/5] ARM: DRA72x: clocks: Update the hwdata Lokesh Vutla
@ 2014-05-15 5:38 ` Lokesh Vutla
2014-05-23 23:50 ` [U-Boot] [U-Boot,U-Boot,4/5] " Tom Rini
2014-05-15 5:38 ` [U-Boot] [U-Boot PATCH 5/5] ARM: DRA7xx: ctrl: Fix efuse register addresses Lokesh Vutla
2014-05-22 9:50 ` [U-Boot] [U-Boot PATCH 0/5] ARM: DRA72x: Add support for DRA72x SoC Mugunthan V N
5 siblings, 1 reply; 12+ messages in thread
From: Lokesh Vutla @ 2014-05-15 5:38 UTC (permalink / raw)
To: u-boot
DRA72 has 1GB connected to EMIF1 only. Updating the details.
And also enable WA for BUG0039 only if corresponding EMIF is present.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tom Rini <trini@ti.com>
---
arch/arm/cpu/armv7/omap-common/emif-common.c | 6 ++++--
arch/arm/cpu/armv7/omap5/hw_data.c | 1 +
arch/arm/cpu/armv7/omap5/sdram.c | 19 ++++++++++++++++++-
3 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c
index 429c4be..71c0cc8 100644
--- a/arch/arm/cpu/armv7/omap-common/emif-common.c
+++ b/arch/arm/cpu/armv7/omap-common/emif-common.c
@@ -1384,8 +1384,10 @@ void sdram_init(void)
if (sdram_type == EMIF_SDRAM_TYPE_DDR3 &&
(!in_sdram && !warm_reset())) {
- do_bug0039_workaround(EMIF1_BASE);
- do_bug0039_workaround(EMIF2_BASE);
+ if (emif1_enabled)
+ do_bug0039_workaround(EMIF1_BASE);
+ if (emif2_enabled)
+ do_bug0039_workaround(EMIF2_BASE);
}
debug("<<sdram_init()\n");
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 1a6798d..4baca11 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -619,6 +619,7 @@ void get_ioregs(const struct ctrl_ioregs **regs)
break;
case DRA752_ES1_0:
case DRA752_ES1_1:
+ case DRA722_ES1_0:
*regs = &ioregs_dra7xx_es1;
break;
diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c
index 16a91f9..e2ebab8 100644
--- a/arch/arm/cpu/armv7/omap5/sdram.c
+++ b/arch/arm/cpu/armv7/omap5/sdram.c
@@ -229,6 +229,17 @@ const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2 = {
.is_ma_present = 0x1
};
+/*
+ * DRA722 EVM EMIF1 CONFIGURATION
+ */
+const struct dmm_lisa_map_regs lisa_map_2G_x_2 = {
+ .dmm_lisa_map_0 = 0x0,
+ .dmm_lisa_map_1 = 0x0,
+ .dmm_lisa_map_2 = 0x80600100,
+ .dmm_lisa_map_3 = 0xFF020100,
+ .is_ma_present = 0x1
+};
+
static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
{
switch (omap_revision()) {
@@ -255,6 +266,7 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
break;
}
break;
+ case DRA722_ES1_0:
default:
*regs = &emif_1_regs_ddr3_532_mhz_1cs_dra_es1;
}
@@ -275,8 +287,11 @@ static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
break;
case DRA752_ES1_0:
case DRA752_ES1_1:
- default:
*dmm_lisa_regs = &lisa_map_2G_x_2_x_2_2G_x_1_x_2;
+ break;
+ case DRA722_ES1_0:
+ default:
+ *dmm_lisa_regs = &lisa_map_2G_x_2;
}
}
@@ -463,6 +478,7 @@ static void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
break;
case DRA752_ES1_0:
case DRA752_ES1_1:
+ case DRA722_ES1_0:
if (emif_nr == 1) {
*regs = dra_ddr3_ext_phy_ctrl_const_base_es1_emif1;
*size =
@@ -630,6 +646,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations)
break;
case DRA752_ES1_0:
case DRA752_ES1_1:
+ case DRA722_ES1_0:
bug_00339_regs_ptr = dra_bug_00339_regs;
*iterations = sizeof(dra_bug_00339_regs)/
sizeof(dra_bug_00339_regs[0]);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [U-Boot PATCH 5/5] ARM: DRA7xx: ctrl: Fix efuse register addresses
2014-05-15 5:38 [U-Boot] [U-Boot PATCH 0/5] ARM: DRA72x: Add support for DRA72x SoC Lokesh Vutla
` (3 preceding siblings ...)
2014-05-15 5:38 ` [U-Boot] [U-Boot PATCH 4/5] ARM: DRA72x: Update EMIF data Lokesh Vutla
@ 2014-05-15 5:38 ` Lokesh Vutla
2014-05-23 23:50 ` [U-Boot] [U-Boot, U-Boot, " Tom Rini
2014-05-22 9:50 ` [U-Boot] [U-Boot PATCH 0/5] ARM: DRA72x: Add support for DRA72x SoC Mugunthan V N
5 siblings, 1 reply; 12+ messages in thread
From: Lokesh Vutla @ 2014-05-15 5:38 UTC (permalink / raw)
To: u-boot
Efuse register addresses are wrongly programmed.
Fixing the same.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tom Rini <trini@ti.com>
---
arch/arm/cpu/armv7/omap5/prcm-regs.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index 7292161..ff08ef4 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -447,10 +447,10 @@ struct omap_sys_ctrl_regs const dra7xx_ctrl = {
.control_wkup_control_spare_r = 0x4AE0C5B4,
.control_wkup_control_spare_r_c0 = 0x4AE0C5B8,
.control_srcomp_east_side_wkup = 0x4AE0C5BC,
- .control_efuse_1 = 0x4AE0C5C0,
- .control_efuse_2 = 0x4AE0C5C4,
- .control_efuse_3 = 0x4AE0C5C8,
- .control_efuse_4 = 0x4AE0C5CC,
+ .control_efuse_1 = 0x4AE0C5C8,
+ .control_efuse_2 = 0x4AE0C5CC,
+ .control_efuse_3 = 0x4AE0C5D0,
+ .control_efuse_4 = 0x4AE0C5D4,
.control_efuse_13 = 0x4AE0C5F0,
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [U-Boot PATCH 0/5] ARM: DRA72x: Add support for DRA72x SoC
2014-05-15 5:38 [U-Boot] [U-Boot PATCH 0/5] ARM: DRA72x: Add support for DRA72x SoC Lokesh Vutla
` (4 preceding siblings ...)
2014-05-15 5:38 ` [U-Boot] [U-Boot PATCH 5/5] ARM: DRA7xx: ctrl: Fix efuse register addresses Lokesh Vutla
@ 2014-05-22 9:50 ` Mugunthan V N
5 siblings, 0 replies; 12+ messages in thread
From: Mugunthan V N @ 2014-05-22 9:50 UTC (permalink / raw)
To: u-boot
On Thursday 15 May 2014 11:08 AM, Lokesh Vutla wrote:
> DRA72x devices are single core Cortex A15 devices belonging to the
> DRA7xx family.
> This series adds support for DRA72x family Socs and the data for
> DRA722 ES1.0 soc.
>
> Tested on: DRA722 ES1.0
> Verfied MAKEALL -s omap
>
> Keerthy (1):
> ARM: DRA72x: volt: Update the pmic offsets
>
> Lokesh Vutla (4):
> ARM: DRA72x: Add Silicon ID support
> ARM: DRA72x: clocks: Update the hwdata
> ARM: DRA72x: Update EMIF data
> ARM: DRA7xx: ctrl: Fix efuse register addresses
>
> arch/arm/cpu/armv7/omap-common/emif-common.c | 6 ++--
> arch/arm/cpu/armv7/omap5/hw_data.c | 40 ++++++++++++++++++++++++++
> arch/arm/cpu/armv7/omap5/hwinit.c | 3 ++
> arch/arm/cpu/armv7/omap5/prcm-regs.c | 8 +++---
> arch/arm/cpu/armv7/omap5/sdram.c | 19 +++++++++++-
> arch/arm/include/asm/arch-omap5/omap.h | 1 +
> arch/arm/include/asm/omap_common.h | 1 +
> 7 files changed, 71 insertions(+), 7 deletions(-)
>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Regards
Mugunthan V N
^ permalink raw reply [flat|nested] 12+ messages in thread