From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jaehoon Chung Date: Fri, 23 May 2014 11:20:26 +0900 Subject: [U-Boot] [PATCHv5 09/14] mmc: support the DDR mode for eMMC In-Reply-To: <537C9381.9010904@digi.com> References: <1400216399-26721-1-git-send-email-jh80.chung@samsung.com> <1400216399-26721-10-git-send-email-jh80.chung@samsung.com> <537B84B6.2040401@digi.com> <537C0D84.70006@samsung.com> <537C9381.9010904@digi.com> Message-ID: <537EB06A.7090608@samsung.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 05/21/2014 08:52 PM, Hector Palacios wrote: > On 05/21/2014 04:20 AM, Jaehoon Chung wrote: >> Hi, Hector. >> >> On 05/21/2014 01:37 AM, Hector Palacios wrote: >>> Hi, >>> >>> On 05/16/2014 06:59 AM, Jaehoon Chung wrote: >>>> Signed-off-by: Jaehoon Chung >>>> Tested-by: Lukasz Majewski >>>> Acked-by: Lukasz Majewski >>> >>> What platforms did you test DDR mode on? >> >> I have tested DDR mode with exynos board. >> >>> I tried this on an Freescale i.MX6 based platform but the driver returned error code COM_ERR (-18) when trying to switch to any of the DDR modes. I guess the fsl_esdhc.c driver needs some adaptation for DDR to work. >> >> I didn't know how work DDR mode at fsl_esdhc.c.(If you share the host controller TRM, it's helpful to me.) >> Host controller also need to change the DDR mode. >> >> I wonder your board didn't work not to enable the DDR mode? > > Thank you, yes the fsl_esdhc.c driver does not yet support enabling of DDR mode. > I think it should be easy to implement, I believe it is just a question of changing the clock frequency. I need to change the clock frequency, too. I guess that if controller support the DDR mode, there is a register relevant to DDR mode. Best Regards, Jaehoon Chung > > Best regards, > -- > Hector Palacios >