From: Marc Zyngier <marc.zyngier@arm.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] smp_kick_all_cpus() function's role
Date: Fri, 30 May 2014 09:56:58 +0100 [thread overview]
Message-ID: <538847DA.7010404@arm.com> (raw)
In-Reply-To: <FE7ADED5C2218B4786C09CD97DC4C49FF7F030@exchbj02.viatech.com.bj>
Hi Liu,
On 30/05/14 03:25, TigerLiu at via-alliance.com wrote:
> Hi, Marc:
> I am studying ARMv8's u-boot code with FVP model.
> In do_nonsec_virt_switch() function in bootm.c :
> It will call smp_kick_all_cpus() function :
> It seems it would set GICD_SGIR[24] = 1, forward the interrupt to all
> CPU interfaces except tha tof the processor that requested the
> interrupt.
>
> So, who generated the interrupt(which would be forwarded to other
> cores)?
I suggest you have a look at the GICv2 architecture document, section
4.3.15, which describes the GICD_SGIR register. Writing to this register
generates the interrupt (SGI number in GICD_SGIR[3:0}), and
GICD_SGIR[25:24] determines who gets it.
In short, if you're setting GICD_SGIR[24] to 1, you're sending SGI0 to
all CPUs but yourself. This seems to match the name of the function,
doesn't it?
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2014-05-30 8:56 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-15 13:36 [U-Boot] [PATCH v3 00/13] ARMv7: add PSCI support to u-boot Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 01/13] ARM: HYP/non-sec: move switch to non-sec to the last boot phase Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 02/13] ARM: HYP/non-sec: add a barrier after setting SCR.NS==1 Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 03/13] ARM: non-sec: reset CNTVOFF to zero Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 04/13] ARM: add missing HYP mode constant Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 05/13] ARM: HYP/non-sec: add separate section for secure code Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 06/13] ARM: HYP/non-sec: allow relocation to secure RAM Marc Zyngier
2014-05-30 2:25 ` [U-Boot] smp_kick_all_cpus() function's role TigerLiu at via-alliance.com
2014-05-30 8:56 ` Marc Zyngier [this message]
2014-06-03 2:16 ` TigerLiu at via-alliance.com
2014-06-03 9:19 ` Marc Zyngier
2014-06-03 9:41 ` TigerLiu at via-alliance.com
2014-06-03 9:46 ` Marc Zyngier
2015-02-18 17:42 ` [U-Boot] [PATCH v3 06/13] ARM: HYP/non-sec: allow relocation to secure RAM surya.satyavolu at sirabtech.com
2015-02-19 13:58 ` Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 07/13] ARM: HYP/non-sec: add generic ARMv7 PSCI code Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 08/13] ARM: HYP/non-sec: add the option for a second-stage monitor Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 09/13] ARM: convert arch_fixup_memory_node to a generic FDT fixup function Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 10/13] ARM: HYP/non-sec/PSCI: emit DT nodes Marc Zyngier
2014-05-07 19:24 ` Ian Campbell
2014-05-08 6:22 ` Marc Zyngier
2014-05-08 7:07 ` Ian Campbell
2014-02-15 13:36 ` [U-Boot] [PATCH v3 11/13] sunxi: fix SRAM_B/SRAM_D memory map Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 12/13] sunxi: HYP/non-sec: add sun7i PSCI backend Marc Zyngier
2014-02-15 13:36 ` [U-Boot] [PATCH v3 13/13] sunxi: HYP/non-sec: configure CNTFRQ on all CPUs Marc Zyngier
2014-02-15 14:45 ` [U-Boot] [PATCH v3 00/13] ARMv7: add PSCI support to u-boot Albert ARIBAUD
2014-02-16 12:01 ` Marc Zyngier
2014-04-16 14:45 ` Albert ARIBAUD
2014-04-16 16:09 ` Marc Zyngier
2014-04-16 18:15 ` Jon Loeliger
2014-04-17 8:34 ` Albert ARIBAUD
2014-04-17 8:58 ` Marc Zyngier
2014-04-17 9:41 ` Albert ARIBAUD
2014-04-17 10:33 ` Ian Campbell
2014-04-17 19:55 ` Jon Loeliger
2014-04-18 7:48 ` Marc Zyngier
[not found] ` <CAJgR-BgnbboBcVUeA2ujzwCHZ4kPyedidC42VSrE5U75Dk+CAg@mail.gmail.com>
2014-04-17 20:01 ` [U-Boot] Fwd: " Jon Loeliger
2014-04-18 8:08 ` Marc Zyngier
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