From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hans de Goede Date: Sun, 08 Jun 2014 14:19:33 +0200 Subject: [U-Boot] [PATCH 5/6] sunxi: use setbits_le32 to enable the DMA clock In-Reply-To: <1401991217-1252-5-git-send-email-ijc@hellion.org.uk> References: <1401991173.15729.153.camel@hastur.hellion.org.uk> <1401991217-1252-5-git-send-email-ijc@hellion.org.uk> Message-ID: <539454D5.9030802@redhat.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 06/05/2014 08:00 PM, Ian Campbell wrote: > Signed-off-by: Ian Campbell > --- > v2: Split out from "ahci: provide sunxi SATA driver using AHCI > platform framework" Looks good: Acked-by: Hans de Goede Regards, Hans > --- > arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c > index 5a7da3c..b8b16cf 100644 > --- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c > +++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c > @@ -36,8 +36,7 @@ void clock_init_safe(void) > CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT, > &ccm->cpu_ahb_apb0_cfg); > #ifdef CONFIG_SUN7I > - writel(0x1 << AHB_GATE_OFFSET_DMA | readl(&ccm->ahb_gate0), > - &ccm->ahb_gate0); > + setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA); > #endif > writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); > } >