From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] powerpc/serdes: Add the workaround for erratum A-007186
Date: Wed, 11 Jun 2014 14:36:54 -0700 [thread overview]
Message-ID: <5398CBF6.50507@freescale.com> (raw)
In-Reply-To: <1401266935-6390-1-git-send-email-shaveta@freescale.com>
On 05/28/2014 01:48 AM, Shaveta Leekha wrote:
> SerDes PLL is calibrated at reset. When the junction temperature
> delta from the time the PLL is calibrated exceeds +56C/-66C,
> jitter may increase and can cause PLL to unlock.
>
> This workaround overwrite the SerDes registers with new values,
> to calibrate SerDes registers.
> These values are known to work fine for all temperature ranges.
>
> This workaround is valid for B4, T4 and T2 platforms, so
> added in their config.
>
> Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
> ---
Applied to u-boot-mpc85xx. Sorry for the late notice.
York
prev parent reply other threads:[~2014-06-11 21:36 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-28 8:48 [U-Boot] [PATCH] powerpc/serdes: Add the workaround for erratum A-007186 Shaveta Leekha
2014-06-11 21:36 ` York Sun [this message]
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