* [U-Boot] [PATCH]powerpc/B4420: Fixed incomplete handling for 0x9d serdes2
@ 2014-05-30 18:38 Poonam Aggrwal
2014-06-11 21:37 ` York Sun
0 siblings, 1 reply; 2+ messages in thread
From: Poonam Aggrwal @ 2014-05-30 18:38 UTC (permalink / raw)
To: u-boot
Crossbars and IDT were not getting configured for Serdes2 protocol
0x9d for B4420.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
---
board/freescale/b4860qds/b4860qds.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c
index b2d5378..9d6b9a7 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -488,6 +488,9 @@ int configure_vsc3316_3308(void)
}
switch (serdes2_prtcl) {
+#ifdef CONFIG_PPC_B4420
+ case 0x9d:
+#endif
case 0x9E:
case 0x9A:
case 0x98:
@@ -852,6 +855,9 @@ int config_serdes2_refclks(void)
* For this SerDes2's Refclk1 need to be set to 100MHz
*/
switch (serdes2_prtcl) {
+#ifdef CONFIG_PPC_B4420
+ case 0x9d:
+#endif
case 0x9E:
case 0x9A:
case 0xb2:
--
1.7.4.1
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2014-05-30 18:38 [U-Boot] [PATCH]powerpc/B4420: Fixed incomplete handling for 0x9d serdes2 Poonam Aggrwal
2014-06-11 21:37 ` York Sun
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