From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Tue, 24 Jun 2014 14:39:07 +0200 Subject: [U-Boot] [PATCH 2/4] mx6sx: Add pin definitions In-Reply-To: References: <1402777782-15542-1-git-send-email-festevam@gmail.com> <1402777782-15542-2-git-send-email-festevam@gmail.com> <53A0618A.5020703@denx.de> <53A09010.8060301@boundarydevices.com> Message-ID: <53A9716B.2010501@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Fabio, On 20/06/2014 20:58, Fabio Estevam wrote: > Hi Stefano, > > On Tue, Jun 17, 2014 at 3:59 PM, Eric Nelson > wrote: > >>> Previously, we had IOMUX_PAD, I know. Is there any special reason we >>> cannot use MX6_PAD_DECL even for this new SOC ? I will not want to go >>> back ignoring a lot of work that was done to merge the SOCs together. >>> >> >> The rationale for the MX6_PAD_DECL came from the fact that the >> i.MX6DQ and i.MX6DLS cpu variants had different address schemes, >> but were pin-compatible. >> >> The i.MX6SL (and i.MX6SX) are not, so any board supporting these >> processors only supports that processor. > > As per Eric's explanation I plan to keep this patch unchanged for v2, > if that's ok with you. That is ok - I am sometimes more optimistic about how to simplify code as it is really physeable. Thanks both of you to have clarified the point. Regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================