From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?ISO-8859-1?Q?J=F6rg_Krause?= Date: Wed, 02 Jul 2014 00:47:54 +0200 Subject: [U-Boot] [PATCH V2] usb: ci_udc: Allocate the qTD list directly In-Reply-To: <53B33805.302@wwwdotorg.org> References: <1404172398-6522-1-git-send-email-marex@denx.de> <201407011217.41490.marex@denx.de> <53B2957D.2030101@posteo.de> <201407011319.37499.marex@denx.de> <53B29A01.6080108@posteo.de> <53B33774.3080001@posteo.de> <53B33805.302@wwwdotorg.org> Message-ID: <53B33A9A.50800@posteo.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/02/2014 12:36 AM, Stephen Warren wrote: > On 07/01/2014 04:34 PM, J?rg Krause wrote: >> On 07/01/2014 01:22 PM, J?rg Krause wrote: >>> On 07/01/2014 01:19 PM, Marek Vasut wrote: >>>> [snip] >>>>>> Can you edit arch/arm/cpu/arm926ejs/cache.c and change the debug() to >>>>>> printf() , then re-test please ? I suspect this might trap something >>>>>> still. Ah, and please test on u-boot-usb/master with this patch. >>>>> No additional output on the console. >>>> What does this mean? Do you see warning messages prefixed with >>>> "CACHE: " ? >>> No messages prefixed with "CACHE: ". Just the usual error message. >> I am sorry, but maybe I edited arch/arm/cpu/arm926ejs/ in a another >> branch and compiled in u-boot-usb. If I run now tftp with printf enabled >> in arch/arm/cpu/arm926ejs/cache.c I get the following "CACHE: " messages: >> >> CACHE: Misaligned operation at range [40008000, 4000c653] >> CACHE: Misaligned operation at range [43fd0b0c, 43fd0b60] > That happens right when you first use the UDC driver right? If so, I > hope that "[U-Boot] [PATCH 1/6] usb: ci_udc: fix ci_flush_{qh, qtd} > calls in ci_udc_probe()" will fix that. Checkout clean u-boot-usb/master, applied board specific patches and applied the mentioned patch. Running tftp three times in a row: => reset resetting ... HTLLCLLC U-Boot 2014.07-rc3-g0b32423-dirty (Jul 02 2014 - 00:44:53) CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: NAND, 3V3 DRAM: 64 MiB NAND: 128 MiB In: serial Out: serial Err: serial Net: usb_ether [PRIME] Hit any key to stop autoboot: 0 => tftp imx28-airlino.dtb using ci_udc, OUT ep- IN ep- STATUS ep- MAC 00:19:b8:00:00:02 HOST MAC 00:19:b8:00:00:01 high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device TFTP from server 10.0.0.1; our IP address is 10.0.0.2 Filename 'imx28-airlino.dtb'. Load address: 0x40008000 Loading: ## 4.3 MiB/s done Bytes transferred = 18003 (4653 hex) CACHE: Misaligned operation at range [40008000, 4000c653] => using ci_udc, OUT ep- IN ep- STATUS ep- MAC 00:19:b8:00:00:02 HOST MAC 00:19:b8:00:00:01 high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device TFTP from server 10.0.0.1; our IP address is 10.0.0.2 Filename 'imx28-airlino.dtb'. Load address: 0x40008000 Loading: ## 1.7 MiB/s done Bytes transferred = 18003 (4653 hex) CACHE: Misaligned operation at range [40008000, 4000c653] => using ci_udc, OUT ep- IN ep- STATUS ep- MAC 00:19:b8:00:00:02 HOST MAC 00:19:b8:00:00:01 high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet USB network up! Using usb_ether device TFTP from server 10.0.0.1; our IP address is 10.0.0.2 Filename 'imx28-airlino.dtb'. Load address: 0x40008000 Loading: ## 3.4 MiB/s done Bytes transferred = 18003 (4653 hex) CACHE: Misaligned operation at range [40008000, 4000c653] => using ci_udc, OUT ep- IN ep- STATUS ep- MAC 00:19:b8:00:00:02 HOST MAC 00:19:b8:00:00:01 high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet ERROR: The remote end did not respond in time. at drivers/usb/gadget/ether.c:2388/usb_eth_init()