From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Tue, 01 Jul 2014 16:51:19 -0600 Subject: [U-Boot] [PATCH V2] usb: ci_udc: Allocate the qTD list directly In-Reply-To: <53B33A9A.50800@posteo.de> References: <1404172398-6522-1-git-send-email-marex@denx.de> <201407011217.41490.marex@denx.de> <53B2957D.2030101@posteo.de> <201407011319.37499.marex@denx.de> <53B29A01.6080108@posteo.de> <53B33774.3080001@posteo.de> <53B33805.302@wwwdotorg.org> <53B33A9A.50800@posteo.de> Message-ID: <53B33B67.3030606@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/01/2014 04:47 PM, J?rg Krause wrote: > > On 07/02/2014 12:36 AM, Stephen Warren wrote: >> On 07/01/2014 04:34 PM, J?rg Krause wrote: >>> On 07/01/2014 01:22 PM, J?rg Krause wrote: >>>> On 07/01/2014 01:19 PM, Marek Vasut wrote: >>>>> [snip] >>>>>>> Can you edit arch/arm/cpu/arm926ejs/cache.c and change the debug() to >>>>>>> printf() , then re-test please ? I suspect this might trap something >>>>>>> still. Ah, and please test on u-boot-usb/master with this patch. >>>>>> No additional output on the console. >>>>> What does this mean? Do you see warning messages prefixed with >>>>> "CACHE: " ? >>>> No messages prefixed with "CACHE: ". Just the usual error message. >>> I am sorry, but maybe I edited arch/arm/cpu/arm926ejs/ in a another >>> branch and compiled in u-boot-usb. If I run now tftp with printf enabled >>> in arch/arm/cpu/arm926ejs/cache.c I get the following "CACHE: " messages: >>> >>> CACHE: Misaligned operation at range [40008000, 4000c653] >>> CACHE: Misaligned operation at range [43fd0b0c, 43fd0b60] >> That happens right when you first use the UDC driver right? If so, I >> hope that "[U-Boot] [PATCH 1/6] usb: ci_udc: fix ci_flush_{qh, qtd} >> calls in ci_udc_probe()" will fix that. > > Checkout clean u-boot-usb/master, applied board specific patches and > applied the mentioned patch. Running tftp three times in a row: > ... > U-Boot 2014.07-rc3-g0b32423-dirty (Jul 02 2014 - 00:44:53) ... > => tftp imx28-airlino.dtb ... > Loading: ## > 4.3 MiB/s > done > Bytes transferred = 18003 (4653 hex) > CACHE: Misaligned operation at range [40008000, 4000c653] OK, that particular error happens well after the network transfer phase of the tftp command, so is likely nothing to do with ci_udc. It'd be great if you could track it down and fix it though. Ah, I bet that 40008000 is your load address; the address that the downloaded data is being copied to?