[U-Boot] [PATCH 3/4] ARM: LS1021A: enable ARMv7 virt support for LS1021A A7

Diana Craciun
2014-07-04T11:35:08Z

On 07/04/2014 04:48 AM, Xiubo Li-B47053 wrote:
>>> diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
>>> index d639a6f..f090971 100644
>>> --- a/include/configs/ls1021aqds.h
>>> +++ b/include/configs/ls1021aqds.h
>>> @@ -18,6 +18,15 @@
>>> #define CONFIG_BOARD_EARLY_INIT_F
>>> #define CONFIG_ARCH_EARLY_INIT_R
>>>
>>> +#define CONFIG_ARMV7_NONSEC
>>> +#define CONFIG_ARMV7_VIRT
>>> +#define CONFIG_SOC_BIG_ENDIAN
>>> +#define CONFIG_DCFG_CCSR_SCRATCHRW1 0x01ee0200
>>> +#define CONFIG_DCFG_CCSR_BRR 0x01ee00e4
>> Why are you hardcoding the register addresses in this file? I saw that
>> all registers are defined in:
>> arch/arm/include/asm/arch-ls102xa/config.h. Why are these special?
>>
> No special, and I'll follow your advice.
>
>
>>> +#define CONFIG_SMP_PEN_ADDR CONFIG_DCFG_CCSR_SCRATCHRW1
>>> +#define CONFIG_ARM_GIC_BASE_ADDRESS 0x01400000
>> Why do you need the GIC base address? Can't this be read from CBAR?
>>
> I'm not very sure, I have tried, but failed, I will do some research later.

What is not working? Is the address returned by CBAR wrong?

Diana