From mboxrd@z Thu Jan 1 00:00:00 1970 From: Helmut Raiger Date: Wed, 09 Jul 2014 10:22:31 +0200 Subject: [U-Boot] SPL broken on i.mx31 platforms, FIX? In-Reply-To: <53BBA64A.70309@hale.at> References: <53B2B8B8.7010406@hale.at> <53B3AF0E.1010105@hale.at> <53B5121B.809@hale.at> <53BBA64A.70309@hale.at> Message-ID: <53BCFBC7.6040409@hale.at> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, finally I have the SPL running again, with this fix: diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 1cfcca9..53bde12 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -91,4 +91,9 @@ cpu_init_crit: bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ mov pc, lr /* back to my caller */ + + nop + nop + nop + #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S index d68cc47..8c0e3c1 100644 --- a/arch/arm/lib/vectors.S +++ b/arch/arm/lib/vectors.S @@ -50,7 +50,8 @@ _start: #endif _start: - ldr pc, _reset + /* be position independent if SPL is linked at different location */ + b reset ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort I have no clue why the nops are necessary after cpu_init_crit(), but it won't work unless there are at least 3 nops there (pipeline?). It would be nice to have _some_ explanation for this before posting a patch. Helmut -- Scanned by MailScanner.