From: Heiko Schocher <hs@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 1/5] spi, spi_mxc: do not hang in spi_xchg_single
Date: Mon, 14 Jul 2014 09:26:07 +0200 [thread overview]
Message-ID: <53C3860F.7020500@denx.de> (raw)
In-Reply-To: <CAD6G_RQBPMkHdE0uZbKv34gM3Wr7+FjSVvHH26KLx8kV4e3aKw@mail.gmail.com>
Hello Jagan,
Am 12.07.2014 14:54, schrieb Jagan Teki:
> On Sat, Jul 12, 2014 at 9:40 AM, Heiko Schocher<hs@denx.de> wrote:
>> if status register do never set MXC_CSPICTRL_TC, spi_xchg_single
>> endless loops. Add a timeout here to prevent endless hang.
>>
>> Signed-off-by: Heiko Schocher<hs@denx.de>
>> Cc: Dirk Behme<dirk.behme@gmail.com>
>> Cc: Jagannadha Sutradharudu Teki<jagannadh.teki@gmail.com>
>>
>> ---
>> - changes for v2:
>> - use timer api to poll till TC bit is set as Jagan Teki suggested
>> and make this timeout configurable through CONFIG_SYS_SPI_MXC_WAIT
[...]
>> diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
>> index f3f029d..4732850 100644
>> --- a/drivers/spi/mxc_spi.c
>> +++ b/drivers/spi/mxc_spi.c
>> @@ -30,6 +30,10 @@ static unsigned long spi_bases[] = {
>> #define reg_read readl
>> #define reg_write(a, v) writel(v, a)
>>
>> +#if !defined(CONFIG_SYS_SPI_MXC_WAIT)
>> +#define CONFIG_SYS_SPI_MXC_WAIT (CONFIG_SYS_HZ/100) /* 10 ms */
>> +#endif
>> +
>> struct mxc_spi_slave {
>> struct spi_slave slave;
>> unsigned long base;
>> @@ -212,6 +216,8 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen,
>> int nbytes = DIV_ROUND_UP(bitlen, 8);
>> u32 data, cnt, i;
>> struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
>> + u32 ts;
>> + int status;
>>
>> debug("%s: bitlen %d dout 0x%x din 0x%x\n",
>> __func__, bitlen, (u32)dout, (u32)din);
>> @@ -272,9 +278,17 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen,
>> reg_write(®s->ctrl, mxcs->ctrl_reg |
>> MXC_CSPICTRL_EN | MXC_CSPICTRL_XCH);
>>
>> + ts = get_timer(0);
>> + status = reg_read(®s->stat);
>> /* Wait until the TC (Transfer completed) bit is set */
>> - while ((reg_read(®s->stat)& MXC_CSPICTRL_TC) == 0)
>> - ;
>> + while ((status& MXC_CSPICTRL_TC) == 0) {
>> + if (get_timer(ts)> CONFIG_SYS_SPI_MXC_WAIT) {
>> + printf("spi_xchg_single: Timeout!\n");
>> + return -1;
>> + }
>> + udelay(10);
>
> Why you still used explicit delay here, get_timer will do the job
> finite delay right?
Yes, thats right. Good catch, thanks.
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
next prev parent reply other threads:[~2014-07-14 7:26 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-12 4:10 [U-Boot] [PATCH v2 0/5] arm, imx6: add aristainetos board support Heiko Schocher
2014-07-12 4:10 ` [U-Boot] [PATCH v2 1/5] spi, spi_mxc: do not hang in spi_xchg_single Heiko Schocher
2014-07-12 12:54 ` Jagan Teki
2014-07-14 7:26 ` Heiko Schocher [this message]
2014-07-14 8:01 ` Jagan Teki
2014-07-14 8:20 ` Heiko Schocher
2014-07-12 4:10 ` [U-Boot] [PATCH v2 2/5] imx6: add gpr2 usb_otg_id iomux select control define Heiko Schocher
2014-07-15 8:07 ` Stefano Babic
2014-07-12 4:10 ` [U-Boot] [PATCH v2 3/5] i.MX6: define struct pwm_regs and PWMCR_* defines Heiko Schocher
2014-07-15 8:12 ` Stefano Babic
2014-07-15 8:52 ` Heiko Schocher
2014-07-15 8:58 ` Stefano Babic
2014-07-15 9:27 ` Heiko Schocher
2014-07-15 10:40 ` Stefano Babic
2014-07-12 4:10 ` [U-Boot] [PATCH v2 4/5] i.MX6: add enable_spi_clk() Heiko Schocher
2014-07-14 17:13 ` Jagan Teki
2014-07-12 4:10 ` [U-Boot] [PATCH v2 5/5] arm, imx6: add aristainetos board Heiko Schocher
2014-07-15 8:31 ` Stefano Babic
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