From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hans de Goede Date: Sat, 26 Jul 2014 18:25:24 +0200 Subject: [U-Boot] [PATCH v3 2/5] sunxi: add USB EHCI driver In-Reply-To: References: Message-ID: <53D3D674.1070602@redhat.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, On 07/24/2014 10:54 PM, Roman Byshko wrote: > The Allwinner aka sunxi SoCs have one or more USB host controllers. > This adds a driver for their EHCI. > > Signed-off-by: Roman Byshko > --- > drivers/usb/host/Makefile | 1 + > drivers/usb/host/ehci-sunxi.c | 196 ++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 197 insertions(+) > create mode 100644 drivers/usb/host/ehci-sunxi.c > > diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile > index 04c1a64..c4f5157 100644 > --- a/drivers/usb/host/Makefile > +++ b/drivers/usb/host/Makefile > @@ -35,6 +35,7 @@ obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o > obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o > obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o > obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o > +obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o > obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o > obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o > obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o > diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c > new file mode 100644 > index 0000000..dc628ca > --- /dev/null > +++ b/drivers/usb/host/ehci-sunxi.c > @@ -0,0 +1,196 @@ > +/* > + * Copyright (C) 2014 Roman Byshko > + * > + * Roman Byshko > + * > + * Based on code from > + * Allwinner Technology Co., Ltd. > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#include > +#include > +#include > +#include > +#include "ehci.h" > + > +#define SUNXI_USB1_IO_BASE 0x01c14000 > +#define SUNXI_USB2_IO_BASE 0x01c1c000 > + > +#define SUNXI_USB_PMU_IRQ_ENABLE 0x800 > +#define SUNXI_USB_CSR 0x01c13404 > +#define SUNXI_USB_PASSBY_EN 1 > + > +#define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10) > +#define SUNXI_EHCI_AHB_INCR4_BURST_EN (1 << 9) > +#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN (1 << 8) > +#define SUNXI_EHCI_ULPI_BYPASS_EN (1 << 0) > + > +static struct sunxi_ehci_hcd { > + struct usb_hcd *hcd; > + int usb_rst_mask; > + int ahb_clk_mask; > + int gpio_vbus; > + void *csr; > + int irq; > + int id; > +} sunxi_echi_hcd[] = { > + { > + .usb_rst_mask = CCM_USB_CTRL_PHY1_RST, > + .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0, > + .gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO, > + .csr = (void*) SUNXI_USB_CSR, > + .irq = 39, > + .id = 1, > + }, > +#if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1) > + { > + .usb_rst_mask = CCM_USB_CTRL_PHY2_RST, > + .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1, > + .gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO, > + .csr = (void*) SUNXI_USB_CSR, > + .irq = 40, > + .id = 2, > + } > +#endif > +}; > + > +static int enabled_hcd_count = 0; > + > +static void* get_io_base(int hcd_id) > +{ > + if (hcd_id == 1) > + return (void*) SUNXI_USB1_IO_BASE; > + else if (hcd_id == 2) > + return (void*) SUNXI_USB2_IO_BASE; > + else return NULL; > +} > + > +static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr, > + int data, int len) > +{ > + int j = 0, usbc_bit = 0; > + void *dest = sunxi_ehci->csr; > + > + usbc_bit = 1 << (sunxi_ehci->id * 2); > + for (j = 0; j < len; j++) { > + /* set the bit address to be written */ > + clrbits_le32(dest, 0xff << 8); > + setbits_le32(dest, (addr + j) << 8); > + > + clrbits_le32(dest, usbc_bit); > + /* set data bit */ > + if (data & 0x1) > + setbits_le32(dest, 1 << 7); > + else > + clrbits_le32(dest, 1 << 7); > + > + setbits_le32(dest, usbc_bit); > + > + clrbits_le32(dest, usbc_bit); > + > + data >>= 1; > + } > +} > + > +static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci) > +{ > + /* The following comments are machine > + * translated from Chinese, you have been warned! > + */ > + > + /* adjust PHY's magnitude and rate */ > + usb_phy_write(sunxi_ehci, 0x20, 0x14, 5); > + > + /* threshold adjustment disconnect */ > + usb_phy_write(sunxi_ehci, 0x2a, 3, 2); This only should be set to 3 for sun4i, for sun5i and sun7i it should be 2, otherwise usb disconnection does not get detected reliable. IOW this should be: /* threshold adjustment disconnect */ #ifdef CONFIG_SUN4I usb_phy_write(sunxi_ehci, 0x2a, 3, 2); #else usb_phy_write(sunxi_ehci, 0x2a, 2, 2); #endif As the kernel driver does. Please fix this before submitting the next version of this patch. Regards, Hans