From: Igor Grinberg <grinberg@compulab.co.il>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH V2 2/9] mx6: add clock enabling functions
Date: Thu, 07 Aug 2014 17:11:10 +0300 [thread overview]
Message-ID: <53E388FE.1020104@compulab.co.il> (raw)
In-Reply-To: <1407416736-14639-3-git-send-email-nikita@compulab.co.il>
Hi Nikita,
On 08/07/14 16:05, Nikita Kiryanov wrote:
> Add functions to enable/disable clocks for UART, SPI, ENET, and MMC.
>
> Cc: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
> ---
> Changes in V2:
> - No changes.
>
> arch/arm/cpu/armv7/mx6/clock.c | 99 +++++++++++++++++++++++++++++++++++
> arch/arm/include/asm/arch-mx6/clock.h | 5 ++
> 2 files changed, 104 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index 7dd83ec..696dc98 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -36,6 +36,35 @@ void enable_ocotp_clk(unsigned char enable)
> }
> #endif
>
[...]
> +#ifdef CONFIG_FEC_MXC
> +void enable_enet_clk(unsigned char enable)
> +{
> + u32 reg;
> +
> + reg = __raw_readl(&imx_ccm->CCGR1);
> + if (enable)
> + reg |= MXC_CCM_CCGR1_ENET_CLK_ENABLE_MASK;
> + else
> + reg &= ~(MXC_CCM_CCGR1_ENET_CLK_ENABLE_MASK);
> + __raw_writel(reg, &imx_ccm->CCGR1);
> +}
> +#endif
> +
> +#ifdef CONFIG_MXC_UART
> +void enable_uart_clk(unsigned char enable)
> +{
> + u32 reg, mask;
> +
> + reg = __raw_readl(&imx_ccm->CCGR5);
> + mask = MXC_CCM_CCGR5_UART_MASK | MXC_CCM_CCGR5_UART_SERIAL_MASK;
> + if (enable)
> + reg |= mask;
> + else
> + reg &= ~mask;
> + __raw_writel(reg, &imx_ccm->CCGR5);
> +}
> +#endif
> +
> +#ifdef CONFIG_SPI
> +/* spi_num can be from 0 - 4 */
> +int enable_cspi_clock(unsigned char enable, unsigned spi_num)
> +{
> + u32 reg, mask;
> +
> + if (spi_num > 4)
> + return -EINVAL;
> +
> + mask = MXC_CCM_CCGR_CG_MASK << (spi_num * 2);
> + reg = readl(&imx_ccm->CCGR1);
> + if (enable)
> + reg |= mask;
> + else
> + reg &= ~mask;
> +
> + __raw_writel(reg, &imx_ccm->CCGR1);
> + return 0;
> +}
> +#endif
> +
> +#ifdef CONFIG_MMC
> +int enable_usdhc_clk(unsigned char enable, unsigned bus_num)
> +{
> + u32 reg, mask;
> +
> + if (bus_num > 3)
> + return -EINVAL;
> +
> + mask = MXC_CCM_CCGR_CG_MASK << (bus_num * 2 + 2);
> + reg = readl(&imx_ccm->CCGR6);
> + if (enable)
> + reg |= mask;
> + else
> + reg &= ~mask;
> +
> + __raw_writel(reg, &imx_ccm->CCGR6);
> + return 0;
> +}
> +#endif
In all the above functions, can we use the clrsetbits_le32() helpers?
[...]
--
Regards,
Igor.
next prev parent reply other threads:[~2014-08-07 14:11 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-07 13:05 [U-Boot] [PATCH V2 0/9] Introduce cm-fx6 board (partial V2) Nikita Kiryanov
2014-08-07 13:05 ` [U-Boot] [PATCH V2 1/9] spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_* Nikita Kiryanov
2014-08-07 13:49 ` Marek Vasut
2014-08-10 15:19 ` Nikita Kiryanov
2014-08-10 20:39 ` Marek Vasut
2014-08-07 13:05 ` [U-Boot] [PATCH V2 2/9] mx6: add clock enabling functions Nikita Kiryanov
2014-08-07 14:11 ` Igor Grinberg [this message]
2014-08-10 17:15 ` Nikita Kiryanov
2014-08-11 14:22 ` [U-Boot] [PATCH V3 " Nikita Kiryanov
2014-08-11 15:08 ` Igor Grinberg
2014-08-07 13:05 ` [U-Boot] [PATCH V2 3/9] spi: mxc: fix sf probe when using mxc_spi Nikita Kiryanov
2014-08-07 13:52 ` Marek Vasut
2014-08-07 13:05 ` [U-Boot] [PATCH V2 4/9] mtd: spi: add support for M25PE16 and M25PX16 Nikita Kiryanov
2014-08-07 13:05 ` [U-Boot] [PATCH V2 5/9] compulab: eeprom: add support for defining eeprom i2c bus Nikita Kiryanov
2014-08-07 13:53 ` Marek Vasut
2014-08-07 13:05 ` [U-Boot] [PATCH V2 6/9] sata: dwc_ahsata: implement sata_port_status Nikita Kiryanov
2014-08-07 13:53 ` Marek Vasut
2014-08-07 13:05 ` [U-Boot] [PATCH V2 7/9] i2c: imx: add macros to setup pads for multiple SoC types Nikita Kiryanov
2014-08-07 13:05 ` [U-Boot] [PATCH V2 8/9] arm: mx6: ddr: cleanup Nikita Kiryanov
2014-08-07 13:05 ` [U-Boot] [PATCH V2 9/9] arm: mx6: ddr: do not write into reserved bit Nikita Kiryanov
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